From 846ef40a534f7b3c0b4945def933cbf0962a5897 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sat, 3 Jan 2015 19:16:37 +0000 Subject: [PATCH] pa.md (decrement_and_branch_until_zero): Use `Q' constraint instead of `m' constraint. * config/pa/pa.md (decrement_and_branch_until_zero): Use `Q' constraint instead of `m' constraint. Likewise for unnamed movb comparison patterns using reg_before_reload_operand predicate. * config/pa/predicates.md (reg_before_reload_operand): Tighten predicate to reject register index and LO_SUM DLT memory forms after reload. From-SVN: r219162 --- gcc/ChangeLog | 9 +++++++++ gcc/config/pa/pa.md | 8 ++++---- gcc/config/pa/predicates.md | 21 +++++++++++++++------ 3 files changed, 28 insertions(+), 10 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d5980c9a26c..84fd92bef74 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2015-01-03 John David Anglin + + * config/pa/pa.md (decrement_and_branch_until_zero): Use `Q' constraint + instead of `m' constraint. Likewise for unnamed movb comparison + patterns using reg_before_reload_operand predicate. + * config/pa/predicates.md (reg_before_reload_operand): Tighten + predicate to reject register index and LO_SUM DLT memory forms + after reload. + 2015-01-02 Sandra Loosemore * doc/invoke.texi (Option Summary): Fix spelling of diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index fd580275e79..6ee396a1cbf 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -8922,14 +8922,14 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ;; strength reduction is used. It is actually created when the instruction ;; combination phase combines the special loop test. Since this insn ;; is both a jump insn and has an output, it must deal with its own -;; reloads, hence the `m' constraints. The `!' constraints direct reload +;; reloads, hence the `Q' constraints. The `!' constraints direct reload ;; to not choose the register alternatives in the event a reload is needed. (define_insn "decrement_and_branch_until_zero" [(set (pc) (if_then_else (match_operator 2 "comparison_operator" [(plus:SI - (match_operand:SI 0 "reg_before_reload_operand" "+!r,!*f,*m") + (match_operand:SI 0 "reg_before_reload_operand" "+!r,!*f,*Q") (match_operand:SI 1 "int5_operand" "L,L,L")) (const_int 0)]) (label_ref (match_operand 3 "" "")) @@ -9018,7 +9018,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" [(match_operand:SI 1 "register_operand" "r,r,r,r") (const_int 0)]) (label_ref (match_operand 3 "" "")) (pc))) - (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q") + (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*Q,!*q") (match_dup 1))] "" "* return pa_output_movb (operands, insn, which_alternative, 0); " @@ -9090,7 +9090,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" [(match_operand:SI 1 "register_operand" "r,r,r,r") (const_int 0)]) (pc) (label_ref (match_operand 3 "" "")))) - (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q") + (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*Q,!*q") (match_dup 1))] "" "* return pa_output_movb (operands, insn, which_alternative, 1); " diff --git a/gcc/config/pa/predicates.md b/gcc/config/pa/predicates.md index 8dcfce0e92b..405cf7f63c3 100644 --- a/gcc/config/pa/predicates.md +++ b/gcc/config/pa/predicates.md @@ -528,20 +528,29 @@ ;; This predicate is used for branch patterns that internally handle ;; register reloading. We need to accept non-symbolic memory operands ;; after reload to ensure that the pattern is still valid if reload -;; didn't find a hard register for the operand. +;; didn't find a hard register for the operand. We also reject index +;; and lo_sum DLT address as these are invalid for move destinations. (define_predicate "reg_before_reload_operand" (match_code "reg,mem") { + rtx op0; + if (register_operand (op, mode)) return true; - if (reload_completed - && memory_operand (op, mode) - && !symbolic_memory_operand (op, mode)) - return true; + if (!reload_in_progress && !reload_completed) + return false; - return false; + if (! MEM_P (op)) + return false; + + op0 = XEXP (op, 0); + + return (memory_address_p (mode, op0) + && !IS_INDEX_ADDR_P (op0) + && !IS_LO_SUM_DLT_ADDR_P (op0) + && !symbolic_memory_operand (op, mode)); }) ;; True iff OP is a register or const_0 operand for MODE. -- 2.30.2