From 84a6e1769216db4f74c081890d224bb0d94fa370 Mon Sep 17 00:00:00 2001 From: Andrey Miroshnikov Date: Fri, 22 Jul 2022 19:09:11 +0100 Subject: [PATCH] removed question mark --- openpower/svp64-primer/summary.tex | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/svp64-primer/summary.tex b/openpower/svp64-primer/summary.tex index 318125d8b..9523bfdf3 100644 --- a/openpower/svp64-primer/summary.tex +++ b/openpower/svp64-primer/summary.tex @@ -161,7 +161,7 @@ how a Vector's elements are sequentially and linearly mapped onto the \subsection{Simple Vectorisation} \acs{SV} is a Scalable Vector ISA designed for hybrid workloads (CPU, GPU, -VPU, 3D?). Includes features normally found only on Cray-style Supercomputers +VPU, 3D). Includes features normally found only on Cray-style Supercomputers (Cray-1, NEC SX-Aurora) and GPUs. Keeps to a strict uniform RISC paradigm, leveraging a scalar ISA by using "Prefixing". \textbf{No dedicated vector opcodes exist in SV, at all}. -- 2.30.2