From 84c54a10f29f2b2f4b7246640b9aec68cb6cd94e Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 27 Feb 2022 13:50:34 +0000
Subject: [PATCH] add external_core_top.v to build for ulx3s

---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index 88cbdbe..f4dc54d 100644
--- a/Makefile
+++ b/Makefile
@@ -222,6 +222,7 @@ else
                 core_dummy.vhdl
     fpga_files = $(_fpga_files) $(_soc_files)
     synth_files = $(util_files) $(fpga_files) $(clkgen) $(toplevel) $(dmi_dtm)
+    soc_extra_v = external_core_top.v
 endif
 
 GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=$(MEMORY_SIZE) -gRAM_INIT_FILE=$(RAM_INIT_FILE) \
-- 
2.30.2