From 84e48bfb2b57a9b8744b0bd2ffaf250d3221a805 Mon Sep 17 00:00:00 2001 From: whitequark Date: Fri, 14 Dec 2018 16:22:18 +0000 Subject: [PATCH] compat: add run_simulation shim. --- nmigen/compat/__init__.py | 2 +- nmigen/compat/sim/__init__.py | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 nmigen/compat/sim/__init__.py diff --git a/nmigen/compat/__init__.py b/nmigen/compat/__init__.py index a043ea1..a22f559 100644 --- a/nmigen/compat/__init__.py +++ b/nmigen/compat/__init__.py @@ -5,7 +5,7 @@ from .fhdl.bitcontainer import * # from .fhdl.decorators import * # from .fhdl.simplify import * -# from .sim import * +from .sim import * # from .genlib.record import * from .genlib.fsm import * diff --git a/nmigen/compat/sim/__init__.py b/nmigen/compat/sim/__init__.py new file mode 100644 index 0000000..c2a7c7b --- /dev/null +++ b/nmigen/compat/sim/__init__.py @@ -0,0 +1,24 @@ +from ...back.pysim import * + + +__all__ = ["run_simulation"] + + +def run_simulation(fragment_or_module, generators, clocks={"sync": 10}, vcd_name=None, + special_overrides={}): + assert not special_overrides + + if hasattr(fragment_or_module, "get_fragment"): + fragment = fragment_or_module.get_fragment().get_fragment(platform=None) + else: + fragment = fragment_or_module + + if not isinstance(generators, dict): + generators = {"sync": generators} + + with Simulator(fragment, vcd_file=open(vcd_name, "w") if vcd_name else None) as sim: + for domain, period in clocks.items(): + sim.add_clock(period, domain) + for domain, process in generators.items(): + sim.add_sync_process(process, domain) + sim.run() -- 2.30.2