From 84e70556fbd4ed4d00067f732ea177f29e4a2ec1 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 11 Apr 2019 12:12:38 +0100 Subject: [PATCH] intel/devinfo: add basic sanity tests on device database v2: #undef NDEBUG (Eric) Use inc_include & inc_src (Eric) Signed-off-by: Lionel Landwerlin Reviewed-by: Eric Engestrom Reviewed-by: Anuj Phogat anuj.phogat@gmail.com --- src/intel/dev/gen_device_info_test.c | 33 ++++++++++++++++++++++++++++ src/intel/dev/meson.build | 12 ++++++++++ 2 files changed, 45 insertions(+) create mode 100644 src/intel/dev/gen_device_info_test.c diff --git a/src/intel/dev/gen_device_info_test.c b/src/intel/dev/gen_device_info_test.c new file mode 100644 index 00000000000..6d7d279f98c --- /dev/null +++ b/src/intel/dev/gen_device_info_test.c @@ -0,0 +1,33 @@ +#undef NDEBUG + +#include +#include + +#include "gen_device_info.h" + +int +main(int argc, char *argv[]) +{ + struct { + uint32_t pci_id; + const char *name; + } chipsets[] = { +#undef CHIPSET +#define CHIPSET(id, family, str_name) { .pci_id = id, .name = str_name, }, +#include "pci_ids/i965_pci_ids.h" + }; + + for (uint32_t i = 0; i < ARRAY_SIZE(chipsets); i++) { + struct gen_device_info devinfo = { 0, }; + + assert(gen_get_device_info(chipsets[i].pci_id, &devinfo)); + + assert(devinfo.gen != 0); + assert(devinfo.urb.size != 0); + assert(devinfo.num_eu_per_subslice != 0); + assert(devinfo.num_thread_per_eu != 0); + assert(devinfo.timestamp_frequency != 0); + } + + return 0; +} diff --git a/src/intel/dev/meson.build b/src/intel/dev/meson.build index 9027a3ef2b3..0d8543b6b1c 100644 --- a/src/intel/dev/meson.build +++ b/src/intel/dev/meson.build @@ -33,3 +33,15 @@ libintel_dev = static_library( include_directories : [inc_common, inc_intel, inc_include], c_args : [c_vis_args, no_override_init_args], ) + +if with_tests + test('gen_device_info_test', + executable( + 'gen_device_info_test', + 'gen_device_info_test.c', + include_directories : [inc_include, inc_src], + link_with : libintel_dev, + ), + suite : ['intel'], + ) +endif -- 2.30.2