From 85077f5f93f0993176cc1499ea172cd9f0e74dd6 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 27 May 2022 10:05:35 +0100
Subject: [PATCH]

---
 openpower/sv/svp64_quirks.mdwn | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn
index 33743af8f..134b361f8 100644
--- a/openpower/sv/svp64_quirks.mdwn
+++ b/openpower/sv/svp64_quirks.mdwn
@@ -4,7 +4,9 @@ SVP64 is designed around these fundamental and inviolate principles:
 
 1. There are no actual Vector instructions: Scalar instructions
    are the sole exclusive bedrock.
-2. A hardware-level for-loop makes vector elements synonymous
+2. No scalar instruction ever deviates in its encoding or meaning
+   just because it is prefixed.
+3. A hardware-level for-loop makes vector elements 100% synonymous
    with scalar instructions (the suffix)
 
 That said, there are a few exceptional places where these rules get
-- 
2.30.2