From 853e949c0efcf4607fad6d3d4d138f78e1357253 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 4 Feb 2015 16:33:59 +0100 Subject: [PATCH] Disabled (unused) Xilinx tristate buffers --- techlibs/xilinx/cells_sim.v | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v index c7f07e400..1f114a22c 100644 --- a/techlibs/xilinx/cells_sim.v +++ b/techlibs/xilinx/cells_sim.v @@ -23,13 +23,13 @@ module BUFG(output O, input I); assign O = I; endmodule -module OBUFT(output O, input I, T); - assign O = T ? 1'bz : I; -endmodule +// module OBUFT(output O, input I, T); +// assign O = T ? 1'bz : I; +// endmodule -module IOBUF(inout IO, output O, input I, T); - assign O = IO, IO = T ? 1'bz : I; -endmodule +// module IOBUF(inout IO, output O, input I, T); +// assign O = IO, IO = T ? 1'bz : I; +// endmodule module INV(output O, input I); assign O = !I; -- 2.30.2