From 855de96e0f9c9b7e5ac06baf22050e4580ccc9c1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 21 Apr 2023 15:47:47 +0100 Subject: [PATCH] add D-Form and X-Form tables to ls011 --- openpower/sv/rfc/ls011.mdwn | 87 ++++++++++++++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls011.mdwn b/openpower/sv/rfc/ls011.mdwn index 444a7bb73..fb8ee348b 100644 --- a/openpower/sv/rfc/ls011.mdwn +++ b/openpower/sv/rfc/ls011.mdwn @@ -163,7 +163,7 @@ just use `RA` as the address, otherwise remaining the same. No actual change to the Effective Address computation itself occurs, in any of the Post-Update instructions. -** Load Byte and Zero with Post-Update** +**Load Byte and Zero with Post-Update** D-Form @@ -202,6 +202,11 @@ Add the following additional Section to Fixed-Point Load: Book I 3.3.2.1 D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * lbzup RT,D(RA) Pseudo-code: @@ -228,6 +233,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * lbzupx RT,RA,RB Pseudo-code: @@ -254,6 +264,11 @@ Special Registers Altered: D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * lhzup RT,D(RA) Pseudo-code: @@ -280,6 +295,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * lhzupx RT,RA,RB Pseudo-code: @@ -306,6 +326,11 @@ Special Registers Altered: D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * lhaup RT,D(RA) Pseudo-code: @@ -324,6 +349,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * lhaupx RT,RA,RB Pseudo-code: @@ -342,6 +372,11 @@ Special Registers Altered: D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * lwzup RT,D(RA) Pseudo-code: @@ -368,6 +403,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * lwzupx RT,RA,RB Pseudo-code: @@ -394,6 +434,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * lwaupx RT,RA,RB Pseudo-code: @@ -430,6 +475,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RT | RA | RB | XO | / | +``` + * ldupx RT,RA,RB Pseudo-code: @@ -456,6 +506,11 @@ Add the following as a new section in Fixed-Point Store, Book I D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * stbup RS,D(RA) Pseudo-code: @@ -475,6 +530,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RS | RA | RB | XO | / | +``` + * stbupx RS,RA,RB Pseudo-code: @@ -494,6 +554,11 @@ Special Registers Altered: D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * sthup RS,D(RA) Pseudo-code: @@ -513,6 +578,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RS | RA | RB | XO | / | +``` + * sthupx RS,RA,RB Pseudo-code: @@ -532,6 +602,11 @@ Special Registers Altered: D-Form +``` + |0 |6 |9 |10 |11 |16 |31 | + | PO | RT | RA| D | +``` + * stwup RS,D(RA) Pseudo-code: @@ -551,6 +626,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RS | RA | RB | XO | / | +``` + * stwupx RS,RA,RB Pseudo-code: @@ -589,6 +669,11 @@ Special Registers Altered: X-Form +``` + |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 | + | PO | RS | RA | RB | XO | / | +``` + * stdupx RS,RA,RB Pseudo-code: -- 2.30.2