From 85a36581d4c74f9d0edbaeb1f37516fe97b78274 Mon Sep 17 00:00:00 2001 From: Jason Lowe-Power Date: Tue, 28 Aug 2018 18:50:21 -0700 Subject: [PATCH] cpu-kvm, arch-x86: Fix KVM on Intel platforms This is the minimal set of changes from the patch that's been floating around for a few years originally by Mike Upton. See http://reviews.gem5.org/r/2613/ and https://gem5-review.googlesource.com/c/public/gem5/+/7361 The change to the tssDesc is the minimal change to get KVM working on Intel platforms. However, the other changes seem prudent to add. Tested on both Intel (i7-7700) and AMD (EPYC 7451) platforms. Change-Id: I000c7ba102ba161c2bb5e224bf826216cf0ff87a Signed-off-by: Jason Lowe-Power Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12278 Maintainer: Bobby R. Bruce Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power Reviewed-by: Gabe Black Tested-by: kokoro --- src/arch/x86/fs_workload.cc | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/arch/x86/fs_workload.cc b/src/arch/x86/fs_workload.cc index b66ddfd13..a69e50b8d 100644 --- a/src/arch/x86/fs_workload.cc +++ b/src/arch/x86/fs_workload.cc @@ -189,6 +189,12 @@ FsWorkload::initState() // 32 bit data segment SegDescriptor dsDesc = initDesc; + dsDesc.type.e = 0; + dsDesc.type.w = 1; + dsDesc.d = 1; + dsDesc.baseHigh = 0; + dsDesc.baseLow = 0; + uint64_t dsDescVal = dsDesc; phys_proxy.writeBlob(GDTBase + numGDTEntries * 8, (&dsDescVal), 8); @@ -204,10 +210,16 @@ FsWorkload::initState() tc->setMiscReg(MISCREG_SS, (RegVal)ds); tc->setMiscReg(MISCREG_TSL, 0); + SegAttr ldtAttr = 0; + ldtAttr.unusable = 1; + tc->setMiscReg(MISCREG_TSL_ATTR, ldtAttr); tc->setMiscReg(MISCREG_TSG_BASE, GDTBase); tc->setMiscReg(MISCREG_TSG_LIMIT, 8 * numGDTEntries - 1); SegDescriptor tssDesc = initDesc; + tssDesc.type = 0xB; + tssDesc.s = 0; + uint64_t tssDescVal = tssDesc; phys_proxy.writeBlob(GDTBase + numGDTEntries * 8, (&tssDescVal), 8); -- 2.30.2