From 85fabe715c441e1c90fe913e2a6d65f0e487e5e8 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Tue, 2 Feb 2016 23:16:14 +1030 Subject: [PATCH] PowerPC64 ELFv2 entry code This tightens the condition under which ld optimizes PIC entry code to non-PIC. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Further restrict ELFv2 entry optimization. gold/ * powerpc.cc (relocate): Further restrict ELFv2 entry optimization. --- bfd/ChangeLog | 5 +++++ bfd/elf64-ppc.c | 1 + gold/ChangeLog | 4 ++++ gold/powerpc.cc | 1 + 4 files changed, 11 insertions(+) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 898af5684a4..81e751c4ea0 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,8 @@ +2016-02-02 Alan Modra + + * elf64-ppc.c (ppc64_elf_relocate_section): Further restrict + ELFv2 entry optimization. + 2016-02-02 H.J. Lu PR binutils/19547 diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index f9c37b5b3de..369eae52f14 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -13915,6 +13915,7 @@ ppc64_elf_relocate_section (bfd *output_bfd, if (!bfd_link_pic (info) && !info->traditional_format && !htab->opd_abi + && rel->r_addend == 0 && h != NULL && &h->elf == htab->elf.hgot && rel + 1 < relend && rel[1].r_info == ELF64_R_INFO (r_symndx, R_PPC64_REL16_LO) diff --git a/gold/ChangeLog b/gold/ChangeLog index 06cafb05a5a..c0b7e5607a2 100644 --- a/gold/ChangeLog +++ b/gold/ChangeLog @@ -1,3 +1,7 @@ +2016-02-02 Alan Modra + + * powerpc.cc (relocate): Further restrict ELFv2 entry optimization. + 2016-01-15 Han Shen PR gold/19472 - need pc-relative stubs. diff --git a/gold/powerpc.cc b/gold/powerpc.cc index e26a1986711..6df2904b708 100644 --- a/gold/powerpc.cc +++ b/gold/powerpc.cc @@ -7727,6 +7727,7 @@ Target_powerpc::Relocate::relocate( && preloc != NULL && target->abiversion() >= 2 && !parameters->options().output_is_position_independent() + && rela.get_r_addend() == 4 && gsym != NULL && strcmp(gsym->name(), ".TOC.") == 0) { -- 2.30.2