From 868cc37feb268a06215b27b14b882f57f7ddbc33 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 11 Oct 2022 17:09:08 +0100 Subject: [PATCH] add asciidump option to Mem class --- src/openpower/decoder/isa/mem.py | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/openpower/decoder/isa/mem.py b/src/openpower/decoder/isa/mem.py index 9132c357..87453ceb 100644 --- a/src/openpower/decoder/isa/mem.py +++ b/src/openpower/decoder/isa/mem.py @@ -141,7 +141,7 @@ class Mem: log("memassign", addr, sz, val) self.st(addr.value, val.value, sz, swap=False) - def dump(self, printout=True): + def dump(self, printout=True, asciidump=False): keys = list(self.mem.keys()) keys.sort() res = [] @@ -149,7 +149,15 @@ class Mem: res.append(((k*8), self.mem[k])) if not printout: continue - print ("%016x: %016x" % ((k*8) & 0xffffffffffffffff, self.mem[k])) + s = "" + if asciidump: + for i in range(8): + c = chr(self.mem[k]>>(i*8) & 0xff) + if not c.isprintable(): + c = "." + s += c + print ("%016x: %016x" % ((k*8) & 0xffffffffffffffff, + self.mem[k]), s) return res def log_fancy(self, *, kind=LogKind.Default, name="Memory", -- 2.30.2