From 86d13a05fd2207c149311941b49b1866aeabfd5c Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Tue, 3 Apr 2018 17:38:43 +0200 Subject: [PATCH] rs6000: Fix pr69946.c testcase (PR85126) After middle-end changes combine now gets fed different input, from which it makes different (but just as efficient) code. So remove the test for particular asm output. gcc/testsuite/ PR target/85126 * gcc.target/powerpc/pr69946: Adjust comment. Remove scan-assembler-times clause. From-SVN: r259036 --- gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/powerpc/pr69946.c | 7 +++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c40efc93a97..407bb4f5727 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2018-04-03 Segher Boessenkool + + PR target/85126 + * gcc.target/powerpc/pr69946: Adjust comment. Remove + scan-assembler-times clause. + 2018-04-03 Christophe Lyon * gcc.target/arm/armv8_2-fp16-move-1.c: Move -mfloat-abi=hard to diff --git a/gcc/testsuite/gcc.target/powerpc/pr69946.c b/gcc/testsuite/gcc.target/powerpc/pr69946.c index eb0c365d137..e0ff422198d 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr69946.c +++ b/gcc/testsuite/gcc.target/powerpc/pr69946.c @@ -2,9 +2,9 @@ /* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-options "-O2" } */ -/* This generates a rotate:DI by 44, with mask 0xf00, which is implemented - using a rlwinm instruction. We used to write 44 for the shift count - there; it should be 12. */ +/* This used to generate a rotate:DI by 44, with mask 0xf00, which is + implemented using a rlwinm instruction. We used to write 44 for the + shift count there; it should be 12. */ struct A { @@ -35,4 +35,3 @@ foo (void) } /* { dg-final { scan-assembler-not {(?n)rlwinm.*,44,20,23} } } */ -/* { dg-final { scan-assembler-times {(?n)rlwinm.*,12,20,23} 1 } } */ -- 2.30.2