From 86eff151b1252fca5942390bace106b82caa9725 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 7 Jun 2017 09:34:28 +1000 Subject: [PATCH] radv: move chip_class extraction down further. This seems to matter here in a profile, without this we spend a lot more time exiting this function with no flush bits. Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- src/amd/vulkan/si_cmd_buffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a251a1aa7f5..33414c1cbcd 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -1079,7 +1079,7 @@ void si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) { bool is_compute = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; - enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; + if (is_compute) cmd_buffer->state.flush_bits &= ~(RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | @@ -1092,6 +1092,7 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) if (!cmd_buffer->state.flush_bits) return; + enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 128); uint32_t *ptr = NULL; -- 2.30.2