From 879c7f05abfa973867a6cbb8b9c9c033b16eb6ca Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 9 Nov 2018 09:53:43 +0000 Subject: [PATCH] elwidth version of lt --- riscv/sv_insn_redirect.cc | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index 6f9579d..03ffe7f 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -737,7 +737,19 @@ sv_reg_t sv_proc_t::rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs, bool sv_proc_t::rv_lt(sv_reg_t const & lhs, sv_reg_t const & rhs) { - return lhs < rhs; + uint8_t bitwidth = _insn->src_bitwidth; + uint64_t vlhs = 0; + uint64_t vrhs = 0; + if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { + bool result = lhs < rhs; + fprintf(stderr, "lt result %lx %lx %x\n", + (uint64_t)lhs, (uint64_t)rhs, result); + return result; + } + bool result = vlhs < vrhs; + fprintf(stderr, "lt result %lx %lx %d bw %d\n", + (uint64_t)lhs, (uint64_t)rhs, result, bitwidth); + return result; } bool sv_proc_t::rv_lt(sv_sreg_t const & lhs, sv_sreg_t const & rhs) -- 2.30.2