From 87a98dfb76656877edf255cdd7278e0359bb3d2c Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 20 Jul 2018 06:28:44 +0100
Subject: [PATCH] pep8 whitespace cleanup

---
 src/bsv/interface_decl.py |  8 ++++----
 src/bsv/peripheral_gen.py | 10 +++++-----
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py
index 25e5c0a..0588164 100644
--- a/src/bsv/interface_decl.py
+++ b/src/bsv/interface_decl.py
@@ -362,11 +362,11 @@ class Interfaces(InterfacesBase):
 
 # ========= Interface declarations ================ #
 
-mux_interface=MuxInterface('cell',
+mux_interface = MuxInterface('cell',
                              [{'name': 'mux', 'ready': False, 'enabled': False,
                                'bitspec': '{1}', 'action': True}])
 
-io_interface=IOInterface(
+io_interface = IOInterface(
     'io',
     [{'name': 'cell_out', 'enabled': True, },
      {'name': 'cell_outen', 'enabled': True, 'outenmode': True, },
@@ -382,12 +382,12 @@ io_interface=IOInterface(
 # basic test
 if __name__ == '__main__':
 
-    uartinterface_decl=Interface('uart',
+    uartinterface_decl = Interface('uart',
                                    [{'name': 'rx'},
                                     {'name': 'tx', 'action': True},
                                     ])
 
-    twiinterface_decl=Interface('twi',
+    twiinterface_decl = Interface('twi',
                                   [{'name': 'sda', 'outen': True},
                                    {'name': 'scl', 'outen': True},
                                    ])
diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index 9fa2251..9800cf1 100644
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -10,11 +10,11 @@ class PBase(object):
         return "%(name)s%(ifacenum)dEnd" % locals()
 
     def axi_reg_def(self, start, name, ifacenum):
-        name=name.upper()
-        offs=self.num_axi_regs32() * 4 * 16
-        end=start + offs - 1
-        bname=self.axibase(name, ifacenum)
-        bend=self.axiend(name, ifacenum)
+        name = name.upper()
+        offs = self.num_axi_regs32() * 4 * 16
+        end = start + offs - 1
+        bname = self.axibase(name, ifacenum)
+        bend = self.axiend(name, ifacenum)
         comment = "%d 32-bit regs" % self.num_axi_regs32()
         return ("    `define%(bname)s 'h%(start)08X\n"
                 "    `define%(bend)s  'h%(end)08X // %(comment)s" % locals(),
-- 
2.30.2