From 8856d505f4c3bd65b2e3c11b14b806cd34368a4b Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Tue, 15 Mar 2022 01:41:15 -0700 Subject: [PATCH] translate clmul* to python for easier testing --- openpower/__init__.py | 0 openpower/sv/__init__.py | 0 openpower/sv/bitmanip.mdwn | 33 +++---------------------------- openpower/sv/bitmanip/__init__.py | 0 openpower/sv/bitmanip/clmul.py | 8 ++++++++ openpower/sv/bitmanip/clmulh.py | 5 +++++ openpower/sv/bitmanip/clmulr.py | 5 +++++ 7 files changed, 21 insertions(+), 30 deletions(-) create mode 100644 openpower/__init__.py create mode 100644 openpower/sv/__init__.py create mode 100644 openpower/sv/bitmanip/__init__.py create mode 100644 openpower/sv/bitmanip/clmul.py create mode 100644 openpower/sv/bitmanip/clmulh.py create mode 100644 openpower/sv/bitmanip/clmulr.py diff --git a/openpower/__init__.py b/openpower/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/openpower/sv/__init__.py b/openpower/sv/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 6ce42a991..3774322ed 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -547,45 +547,18 @@ They are worth adding as their own non-overwrite operations ### `clmul` Carry-less Multiply -```c -uint_xlen_t clmul(uint_xlen_t RA, uint_xlen_t RB) -{ - uint_xlen_t x = 0; - for (int i = 0; i < XLEN; i++) - if ((RB >> i) & 1) - x ^= RA << i; - return x; -} -``` +[[!inline pagenames="openpower/sv/bitmanip/clmul.py" raw="true" feeds="no" actions="yes"]] ### `clmulh` Carry-less Multiply High -```c -uint_xlen_t clmulh(uint_xlen_t RA, uint_xlen_t RB) -{ - uint_xlen_t x = 0; - for (int i = 1; i < XLEN; i++) - if ((RB >> i) & 1) - x ^= RA >> (XLEN-i); - return x; -} -``` +[[!inline pagenames="openpower/sv/bitmanip/clmulh.py" raw="true" feeds="no" actions="yes"]] ### `clmulr` Carry-less Multiply (Reversed) Useful for CRCs. Equivalent to bit-reversing the result of `clmul` on bit-reversed inputs. -```c -uint_xlen_t clmulr(uint_xlen_t RA, uint_xlen_t RB) -{ - uint_xlen_t x = 0; - for (int i = 0; i < XLEN; i++) - if ((RB >> i) & 1) - x ^= RA >> (XLEN-i-1); - return x; -} -``` +[[!inline pagenames="openpower/sv/bitmanip/clmulr.py" raw="true" feeds="no" actions="yes"]] ## `clmadd` Carry-less Multiply-Add diff --git a/openpower/sv/bitmanip/__init__.py b/openpower/sv/bitmanip/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/openpower/sv/bitmanip/clmul.py b/openpower/sv/bitmanip/clmul.py new file mode 100644 index 000000000..7451c3cc8 --- /dev/null +++ b/openpower/sv/bitmanip/clmul.py @@ -0,0 +1,8 @@ +def clmul(a, b): + x = 0 + i = 0 + while b >> i != 0: + if (b >> i) & 1: + x ^= a << i + i += 1 + return x diff --git a/openpower/sv/bitmanip/clmulh.py b/openpower/sv/bitmanip/clmulh.py new file mode 100644 index 000000000..b170aca3b --- /dev/null +++ b/openpower/sv/bitmanip/clmulh.py @@ -0,0 +1,5 @@ +from .clmul import clmul + + +def clmulh(a, b, XLEN): + return clmul(a, b) >> XLEN diff --git a/openpower/sv/bitmanip/clmulr.py b/openpower/sv/bitmanip/clmulr.py new file mode 100644 index 000000000..5b155b5c5 --- /dev/null +++ b/openpower/sv/bitmanip/clmulr.py @@ -0,0 +1,5 @@ +from .clmul import clmul + + +def clmulh(a, b, XLEN): + return clmul(a, b) >> (XLEN - 1) -- 2.30.2