From 8897ca4f9a8c4baea4aedbec363e95797010a630 Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 28 Jun 2022 05:29:00 +0100 Subject: [PATCH] --- openpower/sv/branches.mdwn | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index 75edd273c..cc3030ea1 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -163,10 +163,10 @@ Conditional: | 4 | 5 | 6 | 7 | 17 | 18 | 19 | 20 | 21 | 22 23 | description | | - | - | - | - | -- | -- | -- | -- | --- |--------|----------------- | -|ALL|SNZ| / | / | | | 0 | 0 | / | LRu sz | normal mode | -|ALL|SNZ| / |VSb| | | 0 | 1 | VLI | LRu sz | VLSET mode | -|ALL|SNZ|CTi| / | | | 1 | 0 | / | LRu sz | CTR-test mode | -|ALL|SNZ|CTi|VSb| | | 1 | 1 | VLI | LRu sz | CTR-test+VLSET mode | +|ALL|SNZ| / | / | SL |SLu | 0 | 0 | / | LRu sz | normal mode | +|ALL|SNZ| / |VSb| SL |SLu | 0 | 1 | VLI | LRu sz | VLSET mode | +|ALL|SNZ|CTi| / | SL |SLu | 1 | 0 | / | LRu sz | CTR-test mode | +|ALL|SNZ|CTi|VSb| SL |SLu | 1 | 1 | VLI | LRu sz | CTR-test+VLSET mode | TODO bits 17,18 for SVSTATE-variant of LR and LRu. -- 2.30.2