From 88b9490b3361c8e7a901134936cd5013abc85158 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 10 Jun 2008 20:50:23 +0200 Subject: [PATCH] i386.md (*btdi_rex64): Change operand 1 predicate to nonmemory_operand. * config/i386/i386.md (*btdi_rex64): Change operand 1 predicate to nonmemory_operand. Add "N" operand constraint. (*btsi): Ditto. (*jcc_btdi_mask_rex64): New instruction and split pattern. (*jcc_btsi_mask): Ditto. (*jcc_btsi_mask_1): Ditto. testsuite/ChangeLog: * gcc.target/i386/bt-mask-1.c: New test. * gcc.target/i386/bt-mask-2.c: Ditto. From-SVN: r136636 --- gcc/ChangeLog | 9 +++ gcc/config/i386/i386.md | 99 ++++++++++++++++++++++- gcc/testsuite/ChangeLog | 9 ++- gcc/testsuite/gcc.target/i386/bt-mask-1.c | 16 ++++ gcc/testsuite/gcc.target/i386/bt-mask-2.c | 16 ++++ 5 files changed, 145 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/bt-mask-1.c create mode 100644 gcc/testsuite/gcc.target/i386/bt-mask-2.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6a2080da1c4..4fcc73f30c7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2008-06-10 Uros Bizjak + + * config/i386/i386.md (*btdi_rex64): Change operand 1 predicate to + nonmemory_operand. Add "N" operand constraint. + (*btsi): Ditto. + (*jcc_btdi_mask_rex64): New instruction and split pattern. + (*jcc_btsi_mask): Ditto. + (*jcc_btsi_mask_1): Ditto. + 2008-06-10 Joseph Myers * config/rs6000/rs6000.c (build_opaque_vector_type): Set diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4da50afce28..ca01494871f 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -13819,7 +13819,7 @@ (zero_extract:DI (match_operand:DI 0 "register_operand" "r") (const_int 1) - (match_operand:DI 1 "register_operand" "r")) + (match_operand:DI 1 "nonmemory_operand" "rN")) (const_int 0)))] "TARGET_64BIT && (TARGET_USE_BT || optimize_size)" "bt{q}\t{%1, %0|%0, %1}" @@ -13831,7 +13831,7 @@ (zero_extract:SI (match_operand:SI 0 "register_operand" "r") (const_int 1) - (match_operand:SI 1 "register_operand" "r")) + (match_operand:SI 1 "nonmemory_operand" "rN")) (const_int 0)))] "TARGET_USE_BT || optimize_size" "bt{l}\t{%1, %0|%0, %1}" @@ -14117,6 +14117,39 @@ PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); }) +;; avoid useless masking of bit offset operand +(define_insn_and_split "*jcc_btdi_mask_rex64" + [(set (pc) + (if_then_else (match_operator 0 "bt_comparison_operator" + [(zero_extract:DI + (match_operand:DI 1 "register_operand" "r") + (const_int 1) + (and:SI + (match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "const_int_operand" "n")))]) + (label_ref (match_operand 4 "" "")) + (pc)))] + "TARGET_64BIT && (TARGET_USE_BT || optimize_size) + && (INTVAL (operands[3]) & 0x3f) == 0x3f" + "#" + "&& 1" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (zero_extract:DI + (match_dup 1) + (const_int 1) + (match_dup 2)) + (const_int 0))) + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CCC FLAGS_REG) (const_int 0)]) + (label_ref (match_dup 4)) + (pc)))] +{ + operands[2] = simplify_gen_subreg (DImode, operands[2], SImode, 0); + + PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); +}) + (define_insn_and_split "*jcc_btsi" [(set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" @@ -14148,6 +14181,35 @@ PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); }) +;; avoid useless masking of bit offset operand +(define_insn_and_split "*jcc_btsi_mask" + [(set (pc) + (if_then_else (match_operator 0 "bt_comparison_operator" + [(zero_extract:SI + (match_operand:SI 1 "register_operand" "r") + (const_int 1) + (and:SI + (match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "const_int_operand" "n")))]) + (label_ref (match_operand 4 "" "")) + (pc)))] + "(TARGET_USE_BT || optimize_size) + && (INTVAL (operands[3]) & 0x1f) == 0x1f" + "#" + "&& 1" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (zero_extract:SI + (match_dup 1) + (const_int 1) + (match_dup 2)) + (const_int 0))) + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CCC FLAGS_REG) (const_int 0)]) + (label_ref (match_dup 4)) + (pc)))] + "PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0])));") + (define_insn_and_split "*jcc_btsi_1" [(set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" @@ -14179,6 +14241,39 @@ PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); }) +;; avoid useless masking of bit offset operand +(define_insn_and_split "*jcc_btsi_mask_1" + [(set (pc) + (if_then_else + (match_operator 0 "bt_comparison_operator" + [(and:SI + (lshiftrt:SI + (match_operand:SI 1 "register_operand" "r") + (subreg:QI + (and:SI + (match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "const_int_operand" "n")) 0)) + (const_int 1)) + (const_int 0)]) + (label_ref (match_operand 4 "" "")) + (pc)))] + "(TARGET_USE_BT || optimize_size) + && (INTVAL (operands[3]) & 0x1f) == 0x1f" + "#" + "&& 1" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (zero_extract:SI + (match_dup 1) + (const_int 1) + (match_dup 2)) + (const_int 0))) + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CCC FLAGS_REG) (const_int 0)]) + (label_ref (match_dup 4)) + (pc)))] + "PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0])));") + ;; Define combination compare-and-branch fp compare instructions to use ;; during early optimization. Splitting the operation apart early makes ;; for bad code when we want to reverse the operation. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1f6c771fa30..072a5cb948f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,8 +1,13 @@ +2008-06-10 Uros Bizjak + + * gcc.target/i386/bt-mask-1.c: New test. + * gcc.target/i386/bt-mask-2.c: Ditto. + 2008-06-10 Uros Bizjak PR target/36473 - * testsuite/gcc.target/i386/bt-1.c: New test. - * testsuite/gcc.target/i386/bt-2.c: Ditto. + * gcc.target/i386/bt-1.c: New test. + * gcc.target/i386/bt-2.c: Ditto. 2008-06-09 Andy Hutchinson diff --git a/gcc/testsuite/gcc.target/i386/bt-mask-1.c b/gcc/testsuite/gcc.target/i386/bt-mask-1.c new file mode 100644 index 00000000000..bdcfd558a1b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/bt-mask-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mtune=core2" } */ + +void foo (void); + +int test (int x, int n) +{ + n &= 0x1f; + + if (x & (0x01 << n)) + foo (); + + return 0; +} + +/* { dg-final { scan-assembler-not "and\[lq\]\[ \t\]" } } */ diff --git a/gcc/testsuite/gcc.target/i386/bt-mask-2.c b/gcc/testsuite/gcc.target/i386/bt-mask-2.c new file mode 100644 index 00000000000..babfc2bcd36 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/bt-mask-2.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mtune=core2" } */ + +void foo (void); + +int test (long x, long n) +{ + n &= 0x3f; + + if (x & ((long)0x01 << n)) + foo (); + + return 0; +} + +/* { dg-final { scan-assembler-not "and\[lq\]\[ \t\]" } } */ -- 2.30.2