From 88f22c34d0f39ee4aca87940bff2cbf47e64b9d7 Mon Sep 17 00:00:00 2001 From: John Baldwin Date: Tue, 11 Sep 2018 17:53:37 +0000 Subject: [PATCH] Fix a typo in a comment. gdb/ChangeLog: * aarch64-fbsd-tdep.h (AARCH64_FBSD_SIZEOF_GREGSET): Fix comment typo. --- gdb/ChangeLog | 5 +++++ gdb/aarch64-fbsd-tdep.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index da66c9d24ce..3106a6f33b5 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2018-09-12 John Baldwin + + * aarch64-fbsd-tdep.h (AARCH64_FBSD_SIZEOF_GREGSET): Fix comment + typo. + 2018-09-12 Sergio Durigan Junior * common/common-utils.c: Don't include ''. diff --git a/gdb/aarch64-fbsd-tdep.h b/gdb/aarch64-fbsd-tdep.h index 4515ea8dcc4..a086834ab6a 100644 --- a/gdb/aarch64-fbsd-tdep.h +++ b/gdb/aarch64-fbsd-tdep.h @@ -21,7 +21,7 @@ /* The general-purpose regset consists of 30 X registers, plus LR, SP, ELR, and SPSR registers. SPSR is 32 bits but the structure is - passed to 64 bit alignment. */ + padded to 64 bit alignment. */ #define AARCH64_FBSD_SIZEOF_GREGSET (34 * X_REGISTER_SIZE) /* The fp regset consists of 32 V registers, plus FPSR and FPCR which -- 2.30.2