From 88fea85f09e2252035bec66ab26c375b45b000f5 Mon Sep 17 00:00:00 2001 From: Ben Widawsky Date: Fri, 21 Nov 2014 10:47:41 -0800 Subject: [PATCH] i965/vec4/gen8: Handle the MUL dest hazard exception Fix one of the few cases where we can't reliable touch the destination hazard bits. I am explicitly doing this patch individually so it is easy to backport. I was tempted to do this patch before the previous patch which reorganized the code, but I believe even doing that first, this is still easy to backport. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212 Signed-off-by: Ben Widawsky Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 20 ++++++++++++++++++-- src/mesa/drivers/dri/i965/brw_vec4.h | 1 + 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 655299472ff..f1d59bda846 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -841,9 +841,25 @@ vec4_visitor::move_push_constants_to_pull_constants() } /* Conditions for which we want to avoid setting the dependency control bits */ -static bool -is_dep_ctrl_unsafe(const vec4_instruction *inst) +bool +vec4_visitor::is_dep_ctrl_unsafe(const vec4_instruction *inst) { +#define IS_DWORD(reg) \ + (reg.type == BRW_REGISTER_TYPE_UD || \ + reg.type == BRW_REGISTER_TYPE_D) + + /* From the destination hazard section of the spec: + * > Instructions other than send, may use this control as long as operations + * > that have different pipeline latencies are not mixed. + */ + if (brw->gen >= 8) { + if (inst->opcode == BRW_OPCODE_MUL && + IS_DWORD(inst->src[0]) && + IS_DWORD(inst->src[1])) + return true; + } +#undef IS_DWORD + /* * mlen: * In the presence of send messages, totally interrupt dependency diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 44aea0ea8ee..aac5954557c 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -390,6 +390,7 @@ public: bool opt_cse(); bool opt_algebraic(); bool opt_register_coalesce(); + bool is_dep_ctrl_unsafe(const vec4_instruction *inst); void opt_set_dependency_control(); void opt_schedule_instructions(); -- 2.30.2