From 8919453c16b36ebbcb48aec5464b8862503017b4 Mon Sep 17 00:00:00 2001 From: Wilco Dijkstra Date: Wed, 24 Sep 2014 18:22:50 +0000 Subject: [PATCH] [AArch64] Improve regmove_costs for 128-bit types. 2014-09-24 Wilco Dijkstra gcc/ * config/aarch64/aarch64.c (aarch64_register_move_cost): Add register move costs for 128-bit types. From-SVN: r215562 --- gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 29 +++++++++++++++++++++-------- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1755c0ff55b..ce6738c852d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-09-24 Wilco Dijkstra + + * config/aarch64/aarch64.c (aarch64_register_move_cost): Add register + move costs for 128-bit types. + 2014-09-24 Martin Jambor * ipa-prop.c (ipa_edge_duplication_hook): Update controlled_use_count diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 348308109a9..4e0cba8da74 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -5986,6 +5986,27 @@ aarch64_register_move_cost (enum machine_mode mode, return aarch64_register_move_cost (mode, from, GENERAL_REGS) + aarch64_register_move_cost (mode, GENERAL_REGS, to); + if (GET_MODE_SIZE (mode) == 16) + { + /* 128-bit operations on general registers require 2 instructions. */ + if (from == GENERAL_REGS && to == GENERAL_REGS) + return regmove_cost->GP2GP * 2; + else if (from == GENERAL_REGS) + return regmove_cost->GP2FP * 2; + else if (to == GENERAL_REGS) + return regmove_cost->FP2GP * 2; + + /* When AdvSIMD instructions are disabled it is not possible to move + a 128-bit value directly between Q registers. This is handled in + secondary reload. A general register is used as a scratch to move + the upper DI value and the lower DI value is moved directly, + hence the cost is the sum of three moves. */ + if (! TARGET_SIMD) + return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; + + return regmove_cost->FP2FP; + } + if (from == GENERAL_REGS && to == GENERAL_REGS) return regmove_cost->GP2GP; else if (from == GENERAL_REGS) @@ -5993,14 +6014,6 @@ aarch64_register_move_cost (enum machine_mode mode, else if (to == GENERAL_REGS) return regmove_cost->FP2GP; - /* When AdvSIMD instructions are disabled it is not possible to move - a 128-bit value directly between Q registers. This is handled in - secondary reload. A general register is used as a scratch to move - the upper DI value and the lower DI value is moved directly, - hence the cost is the sum of three moves. */ - if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 16) - return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; - return regmove_cost->FP2FP; } -- 2.30.2