From 894cacd6776e72ad3c5fa0476c4223b8008b1865 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Mon, 16 May 2022 19:54:58 -0700 Subject: [PATCH] elaborate immediate bits --- openpower/sv/bitmanip/grev_gorc_design.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/bitmanip/grev_gorc_design.mdwn b/openpower/sv/bitmanip/grev_gorc_design.mdwn index b2e4ee666..6816db81b 100644 --- a/openpower/sv/bitmanip/grev_gorc_design.mdwn +++ b/openpower/sv/bitmanip/grev_gorc_design.mdwn @@ -14,6 +14,6 @@ This gives us our final design: -Notice how this still has an overall circuit latency that is essentially equivalent to grev's latency (or shift/rotate's latency). Also notice how this circuit allows specifying much more than just `grev` or `gorc` instructions. A final layer of XOR gates can be added at the input and output, allowing it to function as a `gandc` instruction too, requiring a total of 6-bits of immediate. +Notice how this still has an overall circuit latency that is essentially equivalent to grev's latency (or shift/rotate's latency). Also notice how this circuit allows specifying much more than just `grev` or `gorc` instructions. Layers of XOR gates can be added at the input and output, allowing it to function as a `gandc` instruction too, requiring a total of 6-bits of immediate (1 bit for inverting the input, 1 bit for inverting the output, 4 bits for the look-up-tables). We will also want versions of `grev` that have the shift amount be an immediate (needed for bitwise reverse and byte reversals and other similar instructions.) The immediate-shift-amount version can be specified to always do a `grev` (or maybe only `grev`/`gorc`) operation to save encoding space, since I'd guess it's much more common than any of the other immediate-shift variants. -- 2.30.2