From 89a6d373d313df05d8a424178974d9593839f622 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Mon, 15 May 2023 23:53:40 -0700 Subject: [PATCH] fcvttg*: test FPSCR output --- src/openpower/test/fmv_fcvt/fmv_fcvt.py | 31 +++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/src/openpower/test/fmv_fcvt/fmv_fcvt.py b/src/openpower/test/fmv_fcvt/fmv_fcvt.py index 51de74af..6759bb6a 100644 --- a/src/openpower/test/fmv_fcvt/fmv_fcvt.py +++ b/src/openpower/test/fmv_fcvt/fmv_fcvt.py @@ -3,14 +3,16 @@ from openpower.sv.trans.svp64 import SVP64Asm from openpower.test.state import ExpectedState from openpower.simulator.program import Program from openpower.decoder.isa.caller import SVP64State +from openpower.fpscr import FPSCRState import struct import math class FMvFCvtCases(TestAccumulatorBase): - def js_toint32(self, inp, expected, test_title=""): + def js_toint32(self, inp, expected, test_title="", inp_bits=None): inp = float(inp) - inp_bits = struct.unpack("