From 89abbf9d2cc93accbc7296d409075241f4c3bb3e Mon Sep 17 00:00:00 2001 From: Ian Lance Taylor Date: Tue, 11 Jul 1995 18:25:27 +0000 Subject: [PATCH] Tue Jul 11 14:23:37 1995 Jeff Spiegel * mips-opc.c (L1): Define. (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid, addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti, and wb. Tue Jul 11 11:49:49 1995 Ian Lance Taylor * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu if ISA 3 and addu otherwise, replacing or, since some MIPS chips have multiple add units but only a single logical unit. --- opcodes/ChangeLog | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 000e61a3c25..393e457a86b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,16 @@ +Tue Jul 11 14:23:37 1995 Jeff Spiegel + + * mips-opc.c (L1): Define. + (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid, + addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti, + and wb. + Tue Jul 11 11:49:49 1995 Ian Lance Taylor + * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu + if ISA 3 and addu otherwise, replacing or, since some MIPS chips + have multiple add units but only a single logical unit. + * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3, shifted by 18, without any insertion or extraction function. (insert_cr, extract_cr): Remove. -- 2.30.2