From 89b4515c8c2a20b743febb65ce3df92ede698222 Mon Sep 17 00:00:00 2001 From: Alex Velenko Date: Thu, 23 Jan 2014 14:46:31 +0000 Subject: [PATCH] [AArch64_BE 1/4] Big-Endian lane numbering fix [gcc/] 2014-01-23 Alex Velenko * config/aarch64/aarch64-simd.md (aarch64_be_ld1): New define_insn. (aarch64_be_st1): Likewise. (aarch_ld1): Define_expand modified. (aarch_st1): Likewise. * config/aarch64/aarch64.md (UNSPEC_LD1): New unspec definition. (UNSPEC_ST1): Likewise. [gcc/testsuite/] 2014-01-23 Alex Velenko * gcc.target/aarch64/vld1-vst1_1.c: New test_case. From-SVN: r206968 --- gcc/ChangeLog | 10 ++++ gcc/config/aarch64/aarch64-simd.md | 30 ++++++++++- gcc/config/aarch64/aarch64.md | 2 + gcc/testsuite/ChangeLog | 4 ++ .../gcc.target/aarch64/vld1-vst1_1.c | 52 +++++++++++++++++++ 5 files changed, 96 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f52752d86a4..28e41625f04 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2014-01-23 Alex Velenko + + * config/aarch64/aarch64-simd.md (aarch64_be_ld1): + New define_insn. + (aarch64_be_st1): Likewise. + (aarch_ld1): Define_expand modified. + (aarch_st1): Likewise. + * config/aarch64/aarch64.md (UNSPEC_LD1): New unspec definition. + (UNSPEC_ST1): Likewise. + 2014-01-23 David Holsgrove * config/microblaze/microblaze.md: Add trap insn and attribute diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 43a9c5b27d7..1454a7e11ea 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -3544,6 +3544,24 @@ (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)"))] ) +(define_insn "aarch64_be_ld1" + [(set (match_operand:VALLDI 0 "register_operand" "=w") + (unspec:VALLDI [(match_operand:VALLDI 1 "aarch64_simd_struct_operand" "Utv")] + UNSPEC_LD1))] + "TARGET_SIMD" + "ld1\\t{%0}, %1" + [(set_attr "type" "neon_load1_1reg")] +) + +(define_insn "aarch64_be_st1" + [(set (match_operand:VALLDI 0 "aarch64_simd_struct_operand" "=Utv") + (unspec:VALLDI [(match_operand:VALLDI 1 "register_operand" "w")] + UNSPEC_ST1))] + "TARGET_SIMD" + "st1\\t{%1}, %0" + [(set_attr "type" "neon_store1_1reg")] +) + (define_split [(set (match_operand:OI 0 "register_operand" "") (match_operand:OI 1 "register_operand" ""))] @@ -3762,7 +3780,11 @@ { enum machine_mode mode = mode; rtx mem = gen_rtx_MEM (mode, operands[1]); - emit_move_insn (operands[0], mem); + + if (BYTES_BIG_ENDIAN) + emit_insn (gen_aarch64_be_ld1 (operands[0], mem)); + else + emit_move_insn (operands[0], mem); DONE; }) @@ -3988,7 +4010,11 @@ { enum machine_mode mode = mode; rtx mem = gen_rtx_MEM (mode, operands[0]); - emit_move_insn (mem, operands[1]); + + if (BYTES_BIG_ENDIAN) + emit_insn (gen_aarch64_be_st1 (mem, operands[1])); + else + emit_move_insn (mem, operands[1]); DONE; }) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 3b5e92e4162..8657b168582 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -81,6 +81,7 @@ UNSPEC_GOTSMALLPIC UNSPEC_GOTSMALLTLS UNSPEC_GOTTINYPIC + UNSPEC_LD1 UNSPEC_LD2 UNSPEC_LD3 UNSPEC_LD4 @@ -92,6 +93,7 @@ UNSPEC_SISD_SSHL UNSPEC_SISD_USHL UNSPEC_SSHL_2S + UNSPEC_ST1 UNSPEC_ST2 UNSPEC_ST3 UNSPEC_ST4 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5b33fbbf8d7..d45d3dd45db 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2014-01-23 Alex Velenko + + * gcc.target/aarch64/vld1-vst1_1.c: New test_case. + 2014-01-23 David Holsgrove * gcc.target/microblaze/others/builtin-trap.c: New test, diff --git a/gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c b/gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c new file mode 100644 index 00000000000..d1834a26470 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c @@ -0,0 +1,52 @@ +/* Test vld1 and vst1 maintain consistent indexing. */ +/* { dg-do run } */ +/* { dg-options "-O3" } */ +#include + +extern void abort (void); + +int __attribute__ ((noinline)) +test_vld1_vst1 () +{ + int8x8_t a; + int8x8_t b; + int i = 0; + int8_t c[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; + int8_t d[8]; + a = vld1_s8 (c); + asm volatile ("":::"memory"); + vst1_s8 (d, a); + asm volatile ("":::"memory"); + for (; i < 8; i++) + if (c[i] != d[i]) + return 1; + return 0; +} + +int __attribute__ ((noinline)) +test_vld1q_vst1q () +{ + int16x8_t a; + int16x8_t b; + int i = 0; + int16_t c[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; + int16_t d[8]; + a = vld1q_s16 (c); + asm volatile ("":::"memory"); + vst1q_s16 (d, a); + asm volatile ("":::"memory"); + for (; i < 8; i++) + if (c[i] != d[i]) + return 1; + return 0; +} + +int +main () +{ + if (test_vld1_vst1 ()) + abort (); + if (test_vld1q_vst1q ()) + abort (); + return 0; +} -- 2.30.2