From 8a2f19a7772c80fcac85d6bdfa8e588d6cea1beb Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Tue, 19 Jul 2016 15:23:30 -0700 Subject: [PATCH] i965: Flip the non-coherent framebuffer fetch extension bit on G45-Gen8 hardware. This is not enabled on the original Gen4 part because it lacks surface state tile offsets so it may not be possible to sample from arbitrary non-zero layers of the framebuffer depending on the miptree layout (it should be possible to work around this by allocating a scratch surface and doing the same hack currently used for render targets, but meh...). On Gen9+ even though it should mostly work (feel free to force-enable it in order to compare the coherent and non-coherent paths in terms of performance), there are some corner cases like 1D array layered framebuffers that cannot be handled easily by the non-coherent path because of the incompatible layout in memory of 1D and 2D miptrees (it should be possible to work around this too by doing state-dependent recompiles, but it's hard to care enough since Gen9 has native support for coherent render target reads...) Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/intel_extensions.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 466c384f284..702c40c0f0e 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -281,6 +281,9 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.EXT_shader_integer_mix = ctx->Const.GLSLVersion >= 130; ctx->Extensions.MESA_shader_integer_functions = ctx->Const.GLSLVersion >= 130; + if ((brw->is_g4x || brw->gen >= 5) && brw->gen < 9) + ctx->Extensions.MESA_shader_framebuffer_fetch_non_coherent = true; + if (brw->gen >= 5) { ctx->Extensions.ARB_texture_query_levels = ctx->Const.GLSLVersion >= 130; ctx->Extensions.ARB_texture_query_lod = true; -- 2.30.2