From 8a7ac8fdb223faa60c88c49615b75fb708799135 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 2 Apr 2022 12:43:13 +0100
Subject: [PATCH]

---
 openpower/sv/branches.mdwn | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index b670c76e9..b5411a95b 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -473,7 +473,10 @@ if LK then LR  <-iea  CIA + 4
 
 Simplified pseudocode including LRu and CTR skipping, which illustrates
 clearly that SVP64 Scalar Branches (VL=1) are **not** identical to
-v3.0B Scalar Branches.
+v3.0B Scalar Branches.  The key areas where differences occur are in
+when and why CTR is decremented (CTRtest Mode) and whether LR is
+updated (which is unconditional in v3.0B when LK=1, and conditional
+in SVP64 when LRu=1).
 
 ```
 if (mode_is_64bit) then M <- 0
@@ -492,6 +495,10 @@ if ctr_ok & cond_ok then
 if LK & lr_ok then LR <-iea CIA + 4
 ```
 
+Below is the pseudocode for SVP64 Branches, which is a little less
+obvious but identical to the above. The lack of obviousness is down
+to the early-exit opportunities.
+
 Pseudocode for Horizontal-First Mode:
 
 ```
-- 
2.30.2