From 8a8969957a86d1832434a07169976c0b1b9e837c Mon Sep 17 00:00:00 2001 From: Jozef Lawrynowicz Date: Mon, 7 Oct 2019 20:09:49 +0000 Subject: [PATCH] msp430.c (msp430_file_end): s/msp_/msp430_/ 2019-10-07 Jozef Lawrynowicz * config/msp430/msp430.c (msp430_file_end): s/msp_/msp430_/ (msp430_expand_epilogue): Likewise. * config/msp430/predicates.md: Likewise. * config/msp430/msp430.md: Likewise. Replace blocks of 8 spaces with tabs. From-SVN: r276671 --- gcc/ChangeLog | 8 +++ gcc/config/msp430/msp430.c | 14 ++-- gcc/config/msp430/msp430.md | 122 ++++++++++++++++---------------- gcc/config/msp430/predicates.md | 10 +-- 4 files changed, 82 insertions(+), 72 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 91ebb5a114c..7d8aa956633 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2019-10-07 Jozef Lawrynowicz + + * config/msp430/msp430.c (msp430_file_end): s/msp_/msp430_/ + (msp430_expand_epilogue): Likewise. + * config/msp430/predicates.md: Likewise. + * config/msp430/msp430.md: Likewise. + Replace blocks of 8 spaces with tabs. + 2019-10-07 Jozef Lawrynowicz * config/msp430/msp430-protos.h (msp430_split_addsi): New prototype. diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index add19bdb97c..ae763faada3 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -83,7 +83,7 @@ struct GTY(()) machine_function }; /* This is our init_machine_status, as set in - msp_option_override. */ + msp430_option_override. */ static struct machine_function * msp430_init_machine_status (void) { @@ -2119,18 +2119,20 @@ msp430_file_end (void) construct a .MSP430.attributes section based on the options it is invoked with. The values it reads from these directives are used for validating those options. */ - const char *msp_attr = ".mspabi_attribute"; + const char *msp430_attr = ".mspabi_attribute"; const char *gnu_attr = ".gnu_attribute"; /* Emit .mspabi_attribute directive for OFBA_MSPABI_Tag_ISA. */ - fprintf (asm_out_file, "\t%s %d, %d\n", msp_attr, OFBA_MSPABI_Tag_ISA, + fprintf (asm_out_file, "\t%s %d, %d\n", msp430_attr, OFBA_MSPABI_Tag_ISA, msp430x ? OFBA_MSPABI_Val_ISA_MSP430X : OFBA_MSPABI_Val_ISA_MSP430); /* Emit .mspabi_attribute directive for OFBA_MSPABI_Tag_Code_Model. */ - fprintf (asm_out_file, "\t%s %d, %d\n", msp_attr, OFBA_MSPABI_Tag_Code_Model, + fprintf (asm_out_file, "\t%s %d, %d\n", msp430_attr, + OFBA_MSPABI_Tag_Code_Model, TARGET_LARGE ? OFBA_MSPABI_Val_Model_Large : OFBA_MSPABI_Val_Model_Small); /* Emit .mspabi_attribute directive for OFBA_MSPABI_Tag_Data_Model. */ - fprintf (asm_out_file, "\t%s %d, %d\n", msp_attr, OFBA_MSPABI_Tag_Data_Model, + fprintf (asm_out_file, "\t%s %d, %d\n", msp430_attr, + OFBA_MSPABI_Tag_Data_Model, TARGET_LARGE ? OFBA_MSPABI_Val_Model_Large : OFBA_MSPABI_Val_Model_Small); #ifdef HAVE_AS_MSPABI_ATTRIBUTE @@ -2604,7 +2606,7 @@ msp430_expand_epilogue (int is_eh) else if (is_reentrant_func ()) emit_insn (gen_enable_interrupts ()); - emit_jump_insn (gen_msp_return ()); + emit_jump_insn (gen_msp430_return ()); } /* Implements EH_RETURN_STACKADJ_RTX. Saved and used later in diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index e1c61f5ea3d..ebd9c85fbb6 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -183,15 +183,15 @@ ) (define_insn "movqi_topbyte" - [(set (match_operand:QI 0 "msp_nonimmediate_operand" "=r") - (subreg:QI (match_operand:PSI 1 "msp_general_operand" "r") 2))] + [(set (match_operand:QI 0 "msp430_nonimmediate_operand" "=r") + (subreg:QI (match_operand:PSI 1 "msp430_general_operand" "r") 2))] "msp430x" "PUSHM.A\t#1,%1 { POPM.W\t#1,%0 { POPM.W\t#1,%0" ) (define_insn "movqi" - [(set (match_operand:QI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (match_operand:QI 1 "msp_general_operand" "riYsYx,rmi"))] + [(set (match_operand:QI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (match_operand:QI 1 "msp430_general_operand" "riYsYx,rmi"))] "" "@ MOV.B\t%1, %0 @@ -199,8 +199,8 @@ ) (define_insn "movhi" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=r,rYsYx,rm") - (match_operand:HI 1 "msp_general_operand" "N,riYsYx,rmi"))] + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=r,rYsYx,rm") + (match_operand:HI 1 "msp430_general_operand" "N,riYsYx,rmi"))] "" "@ MOV.B\t%1, %0 @@ -243,8 +243,8 @@ ;; FIXME: Some MOVX.A cases can be done with MOVA, this is only a few of them. (define_insn "movpsi" - [(set (match_operand:PSI 0 "msp_nonimmediate_operand" "=r,r,r,Ya,rm") - (match_operand:PSI 1 "msp_general_operand" "N,O,riYa,r,rmi"))] + [(set (match_operand:PSI 0 "msp430_nonimmediate_operand" "=r,r,r,Ya,rm") + (match_operand:PSI 1 "msp430_general_operand" "N,O,riYa,r,rmi"))] "" "@ MOV.B\t%1, %0 @@ -279,9 +279,9 @@ ;; Math (define_insn "addpsi3" - [(set (match_operand:PSI 0 "msp_nonimmediate_operand" "=r,rm") - (plus:PSI (match_operand:PSI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:PSI 2 "msp_general_operand" "rLs,rmi")))] + [(set (match_operand:PSI 0 "msp430_nonimmediate_operand" "=r,rm") + (plus:PSI (match_operand:PSI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:PSI 2 "msp430_general_operand" "rLs,rmi")))] "" "@ ADDA\t%2, %0 @@ -289,9 +289,9 @@ ) (define_insn "addqi3" - [(set (match_operand:QI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (plus:QI (match_operand:QI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:QI 2 "msp_general_operand" "riYsYx,rmi")))] + [(set (match_operand:QI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (plus:QI (match_operand:QI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:QI 2 "msp430_general_operand" "riYsYx,rmi")))] "" "@ ADD.B\t%2, %0 @@ -299,9 +299,9 @@ ) (define_insn "addhi3" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (plus:HI (match_operand:HI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:HI 2 "msp_general_operand" "riYsYx,rmi")))] + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (plus:HI (match_operand:HI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:HI 2 "msp430_general_operand" "riYsYx,rmi")))] "" "@ ADD.W\t%2, %0 @@ -358,9 +358,9 @@ ; that are not single_set() very well. (define_insn "addhi3_cy" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (plus:HI (match_operand:HI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:HI 2 "msp_nonimmediate_operand" "rYsYxi,rm"))) + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (plus:HI (match_operand:HI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:HI 2 "msp430_nonimmediate_operand" "rYsYxi,rm"))) (set (reg:BI CARRY) (truncate:BI (lshiftrt:SI (plus:SI (zero_extend:SI (match_dup 1)) (zero_extend:SI (match_dup 2))) @@ -389,9 +389,9 @@ ; Version of addhi that adds the carry, for SImode adds. (define_insn "addchi4_cy" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (plus:HI (plus:HI (match_operand:HI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:HI 2 "msp_general_operand" "riYsYx,rmi")) + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (plus:HI (plus:HI (match_operand:HI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:HI 2 "msp430_general_operand" "riYsYx,rmi")) (zero_extend:HI (reg:BI CARRY)))) ] "" @@ -479,8 +479,8 @@ ) (define_insn "*bic_cg" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYs,m") - (and:QHI (match_operand:QHI 1 "msp_general_operand" "0,0") + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=rYs,m") + (and:QHI (match_operand:QHI 1 "msp430_general_operand" "0,0") (match_operand 2 "msp430_inv_constgen_operator" "n,n")))] "" "@ @@ -489,9 +489,9 @@ ) (define_insn "bic3" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (and:QHI (not:QHI (match_operand:QHI 1 "msp_general_operand" "rYsYx,rmn")) - (match_operand:QHI 2 "msp_nonimmediate_operand" "0,0")))] + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (and:QHI (not:QHI (match_operand:QHI 1 "msp430_general_operand" "rYsYx,rmn")) + (match_operand:QHI 2 "msp430_nonimmediate_operand" "0,0")))] "" "@ BIC%x0%b0\t%1, %0 @@ -499,9 +499,9 @@ ) (define_insn "and3" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=r,rYsYx,rm") - (and:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "%0,0,0") - (match_operand:QHI 2 "msp_general_operand" "N,riYsYx,rmi")))] + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=r,rYsYx,rm") + (and:QHI (match_operand:QHI 1 "msp430_nonimmediate_operand" "%0,0,0") + (match_operand:QHI 2 "msp430_general_operand" "N,riYsYx,rmi")))] "" "@ AND%x0.B\t%2, %0 @@ -510,9 +510,9 @@ ) (define_insn "ior3" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (ior:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:QHI 2 "msp_general_operand" "riYsYx,rmi")))] + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (ior:QHI (match_operand:QHI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:QHI 2 "msp430_general_operand" "riYsYx,rmi")))] "" "@ BIS%x0%b0\t%2, %0 @@ -520,9 +520,9 @@ ) (define_insn "xor3" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYsYx,rm") - (xor:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "%0,0") - (match_operand:QHI 2 "msp_general_operand" "riYsYx,rmi")))] + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=rYsYx,rm") + (xor:QHI (match_operand:QHI 1 "msp430_nonimmediate_operand" "%0,0") + (match_operand:QHI 2 "msp430_general_operand" "riYsYx,rmi")))] "" "@ XOR%x0%b0\t%2, %0 @@ -531,8 +531,8 @@ ;; Macro : XOR #~0, %0 (define_insn "one_cmpl2" - [(set (match_operand:QHI 0 "msp_nonimmediate_operand" "=rYs,m") - (not:QHI (match_operand:QHI 1 "msp_nonimmediate_operand" "0,0")))] + [(set (match_operand:QHI 0 "msp430_nonimmediate_operand" "=rYs,m") + (not:QHI (match_operand:QHI 1 "msp430_nonimmediate_operand" "0,0")))] "" "@ INV%x0%b0\t%0 @@ -540,8 +540,8 @@ ) (define_insn "extendqihi2" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYs,m") - (sign_extend:HI (match_operand:QI 1 "msp_nonimmediate_operand" "0,0")))] + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rYs,m") + (sign_extend:HI (match_operand:QI 1 "msp430_nonimmediate_operand" "0,0")))] "" "@ SXT%X0\t%0 @@ -549,8 +549,8 @@ ) (define_insn "zero_extendqihi2" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rYs,r,r,m") - (zero_extend:HI (match_operand:QI 1 "msp_nonimmediate_operand" "0,rYs,m,0")))] + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rYs,r,r,m") + (zero_extend:HI (match_operand:QI 1 "msp430_nonimmediate_operand" "0,rYs,m,0")))] "" "@ AND\t#0xff, %0 @@ -571,8 +571,8 @@ ) (define_insn "zero_extendhipsi2" - [(set (match_operand:PSI 0 "msp_nonimmediate_operand" "=r,m") - (zero_extend:PSI (match_operand:HI 1 "msp_nonimmediate_operand" "rm,r")))] + [(set (match_operand:PSI 0 "msp430_nonimmediate_operand" "=r,m") + (zero_extend:PSI (match_operand:HI 1 "msp430_nonimmediate_operand" "rm,r")))] "" "@ MOVX\t%1, %0 @@ -580,7 +580,7 @@ ) (define_insn "truncpsihi2" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rm") + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rm") (truncate:HI (match_operand:PSI 1 "register_operand" "r")))] "" "MOVX\t%1, %0" @@ -851,8 +851,8 @@ ) (define_insn "srai_1" - [(set (match_operand:HI 0 "msp_nonimmediate_operand" "=rm") - (ashiftrt:HI (match_operand:HI 1 "msp_general_operand" "0") + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rm") + (ashiftrt:HI (match_operand:HI 1 "msp430_general_operand" "0") (const_int 1)))] "" "RRA%X0.W\t%0" @@ -1094,7 +1094,7 @@ "CALL%Q0\t%1" ) -(define_insn "msp_return" +(define_insn "msp430_return" [(return)] "" { return msp430_is_interrupt_func () ? "RETI" : (TARGET_LARGE ? "RETA" : "RET"); } @@ -1274,8 +1274,8 @@ (define_insn "*bitbranch4" [(set (pc) (if_then_else - (ne (and:QHI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYsYx,rm") - (match_operand:QHI 1 "msp_general_operand" "rYsYxi,rmi")) + (ne (and:QHI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rYsYx,rm") + (match_operand:QHI 1 "msp430_general_operand" "rYsYxi,rmi")) (const_int 0)) (label_ref (match_operand 2 "" "")) (pc))) @@ -1289,8 +1289,8 @@ (define_insn "*bitbranch4" [(set (pc) (if_then_else - (eq (and:QHI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYsYx,rm") - (match_operand:QHI 1 "msp_general_operand" "rYsYxi,rmi")) + (eq (and:QHI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rYsYx,rm") + (match_operand:QHI 1 "msp430_general_operand" "rYsYxi,rmi")) (const_int 0)) (label_ref (match_operand 2 "" "")) (pc))) @@ -1304,8 +1304,8 @@ (define_insn "*bitbranch4" [(set (pc) (if_then_else - (eq (and:QHI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYsYx,rm") - (match_operand:QHI 1 "msp_general_operand" "rYsYxi,rmi")) + (eq (and:QHI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rYsYx,rm") + (match_operand:QHI 1 "msp430_general_operand" "rYsYxi,rmi")) (const_int 0)) (pc) (label_ref (match_operand 2 "" "")))) @@ -1319,8 +1319,8 @@ (define_insn "*bitbranch4" [(set (pc) (if_then_else - (ne (and:QHI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYsYx,rm") - (match_operand:QHI 1 "msp_general_operand" "rYsYxi,rmi")) + (ne (and:QHI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rYsYx,rm") + (match_operand:QHI 1 "msp430_general_operand" "rYsYxi,rmi")) (const_int 0)) (pc) (label_ref (match_operand 2 "" "")))) @@ -1337,7 +1337,7 @@ (define_insn "*bitbranch4_z" [(set (pc) (if_then_else - (ne (zero_extract:HI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYs,rm") + (ne (zero_extract:HI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rYs,rm") (const_int 1) (match_operand 1 "msp430_bitpos" "i,i")) (const_int 0)) @@ -1353,7 +1353,7 @@ (define_insn "*bitbranch4_z" [(set (pc) (if_then_else - (eq (zero_extract:HI (match_operand:QHI 0 "msp_nonimmediate_operand" "rm") + (eq (zero_extract:HI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rm") (const_int 1) (match_operand 1 "msp430_bitpos" "i")) (const_int 0)) @@ -1367,7 +1367,7 @@ (define_insn "*bitbranch4_z" [(set (pc) (if_then_else - (eq (zero_extract:HI (match_operand:QHI 0 "msp_nonimmediate_operand" "rm") + (eq (zero_extract:HI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rm") (const_int 1) (match_operand 1 "msp430_bitpos" "i")) (const_int 0)) @@ -1381,7 +1381,7 @@ (define_insn "*bitbranch4_z" [(set (pc) (if_then_else - (ne (zero_extract:HI (match_operand:QHI 0 "msp_nonimmediate_operand" "rm") + (ne (zero_extract:HI (match_operand:QHI 0 "msp430_nonimmediate_operand" "rm") (const_int 1) (match_operand 1 "msp430_bitpos" "i")) (const_int 0)) diff --git a/gcc/config/msp430/predicates.md b/gcc/config/msp430/predicates.md index 1bfd33da524..751548c4ae8 100644 --- a/gcc/config/msp430/predicates.md +++ b/gcc/config/msp430/predicates.md @@ -18,7 +18,7 @@ ;; along with GCC; see the file COPYING3. If not see ;; . -(define_predicate "msp_volatile_memory_operand" +(define_predicate "msp430_volatile_memory_operand" (and (match_code "mem") (match_test ("memory_address_addr_space_p (GET_MODE (op), XEXP (op, 0), MEM_ADDR_SPACE (op))"))) ) @@ -26,16 +26,16 @@ ; TRUE for any valid general operand. We do this because ; general_operand refuses to match volatile memory refs. -(define_predicate "msp_general_operand" +(define_predicate "msp430_general_operand" (ior (match_operand 0 "general_operand") - (match_operand 0 "msp_volatile_memory_operand")) + (match_operand 0 "msp430_volatile_memory_operand")) ) ; Likewise for nonimmediate_operand. -(define_predicate "msp_nonimmediate_operand" +(define_predicate "msp430_nonimmediate_operand" (ior (match_operand 0 "nonimmediate_operand") - (match_operand 0 "msp_volatile_memory_operand")) + (match_operand 0 "msp430_volatile_memory_operand")) ) (define_predicate "ubyte_operand" -- 2.30.2