From 8adcad213ef6cbbaa9adf1485827125cc05aa033 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 30 Aug 2011 15:50:17 -0700 Subject: [PATCH] i965/vs: Fix GPU hangs in shaders with large virtual GRFs pre-gen6. If you get your total GRF count wrong, you write over some other shader's g0, and the GPU fails shortly thereafter. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index 72e0c0755f7..9fd4922bb3f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -216,7 +216,8 @@ vec4_visitor::reg_allocate() int reg = ra_get_node_reg(g, i); hw_reg_mapping[i] = first_assigned_grf + brw->vs.ra_reg_to_grf[reg]; - prog_data->total_grf = MAX2(prog_data->total_grf, hw_reg_mapping[i] + 1); + prog_data->total_grf = MAX2(prog_data->total_grf, + hw_reg_mapping[i] + virtual_grf_sizes[i]); } foreach_list(node, &this->instructions) { -- 2.30.2