From 8b798c2466bdd73f9a17f77a8ceba2b4929b0473 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sun, 7 Apr 2024 14:29:01 -0300 Subject: [PATCH] ls2: fix keyword for declaring pin voltage type on Xilinx devices --- src/ls2.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ls2.py b/src/ls2.py index 5ffab70..2a17fae 100644 --- a/src/ls2.py +++ b/src/ls2.py @@ -968,7 +968,7 @@ def build_platform(fpga, firmware): Subsignal("dq3", Pins("M14", dir="io")), Subsignal("cs_n", Pins("L13", dir="o")), Subsignal("clk", Pins("L16", dir="o")), - Attrs(PULLMODE="NONE", DRIVE="4", IO_TYPE="LVCMOS33")) + Attrs(PULLMODE="NONE", DRIVE="4", IOSTANDARD="LVCMOS33")) ] platform.add_resources(spi_0_ios) spi_0_pins = platform.request("spi_0", 0) -- 2.30.2