From 8bbcc43ad9d8cadfbac86163d0037938c3420830 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Christian=20K=C3=B6nig?= Date: Sat, 21 Sep 2013 15:34:38 +0200 Subject: [PATCH] radeon/uvd: async flush the UVD cs MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit No need to block for the CS thread here. Signed-off-by: Christian König Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/radeon_uvd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index 518978eadf6..fa8110541c5 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.c +++ b/src/gallium/drivers/radeon/radeon_uvd.c @@ -110,7 +110,7 @@ static void flush(struct ruvd_decoder *dec) while(dec->cs->cdw % 16) pm4[dec->cs->cdw++] = RUVD_PKT2(); - dec->ws->cs_flush(dec->cs, 0, 0); + dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0); } /* add a new set register command to the IB */ -- 2.30.2