From 8bde567edd30d4b3ddfb7ba1c885f883284cc417 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 10 May 2021 15:41:14 +0100 Subject: [PATCH] allow unaligned access exception to be raised in ISACaller mem simulator --- src/openpower/decoder/isa/mem.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/openpower/decoder/isa/mem.py b/src/openpower/decoder/isa/mem.py index c92d70ad..2b6c118d 100644 --- a/src/openpower/decoder/isa/mem.py +++ b/src/openpower/decoder/isa/mem.py @@ -27,6 +27,9 @@ def swap_order(x, nbytes): return x +class MemException(Exception): + pass + class Mem: @@ -72,7 +75,10 @@ class Mem: swap, check_in_mem, instr_fetch) remainder = address & (self.bytes_per_word - 1) address = address >> self.word_log2 - assert remainder & (width - 1) == 0, "Unaligned access unsupported!" + if remainder & (width - 1) != 0: + exc = MemException("unaligned", "Unaligned access unsupported!") + exc.dar = address + raise exc if address in self.mem: val = self.mem[address] elif check_in_mem: @@ -97,7 +103,10 @@ class Mem: addr = addr >> self.word_log2 print("Writing 0x{:x} to ST 0x{:x} " "memaddr 0x{:x}/{:x}".format(v, staddr, addr, remainder, swap)) - assert remainder & (width - 1) == 0, "Unaligned access unsupported!" + if remainder & (width - 1) != 0: + exc = MemException("unaligned", "Unaligned access unsupported!") + exc.dar = address + raise exc if swap: v = swap_order(v, width) if width != self.bytes_per_word: -- 2.30.2