From 8be53488681304e4f4261fa41215a5bedea8f7b4 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 21 Feb 2019 13:04:26 +0100 Subject: [PATCH] re PR bootstrap/88714 (bootstrap comparison failure on armv7l since r265398) PR bootstrap/88714 * constraints.md (q): Remove. * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint instead of q. From-SVN: r269067 --- gcc/ChangeLog | 7 +++++++ gcc/config/arm/constraints.md | 3 --- gcc/config/arm/ldrdstrd.md | 4 ++-- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 54a1d928b71..46c918b1666 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-02-21 Jakub Jelinek + + PR bootstrap/88714 + * constraints.md (q): Remove. + * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint + instead of q. + 2019-02-21 Martin Jambor PR hsa/89302 diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index ccde5941b24..57ec0639622 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -90,9 +90,6 @@ (define_register_constraint "k" "STACK_REG" "@internal The stack register.") -(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS" - "@internal In ARM state with LDRD support, core registers, otherwise general registers.") - (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS" "@internal Thumb only. The union of the low registers and the stack register.") diff --git a/gcc/config/arm/ldrdstrd.md b/gcc/config/arm/ldrdstrd.md index bb492bb2915..a151c3140da 100644 --- a/gcc/config/arm/ldrdstrd.md +++ b/gcc/config/arm/ldrdstrd.md @@ -159,7 +159,7 @@ (define_insn "*arm_ldrd" [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r") (match_operand:SI 2 "memory_operand" "m")) - (set (match_operand:SI 1 "s_register_operand" "=q") + (set (match_operand:SI 1 "s_register_operand" "=rk") (match_operand:SI 3 "memory_operand" "m"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, true)" @@ -180,7 +180,7 @@ [(parallel [(set (match_operand:SI 2 "memory_operand" "=m") (match_operand:SI 0 "s_register_operand" "r")) (set (match_operand:SI 3 "memory_operand" "=m") - (match_operand:SI 1 "s_register_operand" "q"))])] + (match_operand:SI 1 "s_register_operand" "rk"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, false)" { -- 2.30.2