From 8bf9b7b5b6e28aad7c0635fab7aa611f86be8d79 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Fri, 12 Apr 2019 11:55:38 -0700 Subject: [PATCH] intel: Emit 3DSTATE_VF_STATISTICS dynamically Pipeline statistics queries should not count BLORP's rectangles. (23) How do operations like Clear, TexSubImage, etc. affect the results of the newly introduced queries? DISCUSSION: Implementations might require "helper" rendering commands be issued to implement certain operations like Clear, TexSubImage, etc. RESOLVED: They don't. Only application submitted rendering commands should have an effect on the results of the queries. Piglit's arb_pipeline_statistics_query-vert_adj exposes this bug when the driver is hacked to always perform glBufferData via a GPU staging copy (for debugging purposes). Reviewed-by: Jason Ekstrand Reviewed-by: Lionel Landwerlin --- src/gallium/drivers/iris/iris_context.h | 1 + src/gallium/drivers/iris/iris_state.c | 6 +++++ src/intel/blorp/blorp_genX_exec.h | 4 ++++ src/intel/vulkan/genX_blorp_exec.c | 5 ---- src/mesa/drivers/dri/i965/brw_misc_state.c | 6 ----- src/mesa/drivers/dri/i965/genX_state_upload.c | 24 +++++++++++++++++++ 6 files changed, 35 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index 4ec73973dc5..4465eef40dd 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -127,6 +127,7 @@ enum iris_param_domain { #define IRIS_DIRTY_VF_TOPOLOGY (1ull << 54) #define IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES (1ull << 55) #define IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES (1ull << 56) +#define IRIS_DIRTY_VF_STATISTICS (1ull << 57) #define IRIS_ALL_DIRTY_FOR_COMPUTE (IRIS_DIRTY_CS | \ IRIS_DIRTY_SAMPLER_STATES_CS | \ diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index bf4fdcae1c9..8d5383598d2 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5055,6 +5055,12 @@ iris_upload_dirty_render_state(struct iris_context *ice, } } + if (dirty & IRIS_DIRTY_VF_STATISTICS) { + iris_emit_cmd(batch, GENX(3DSTATE_VF_STATISTICS), vf) { + vf.StatisticsEnable = true; + } + } + /* TODO: Gen8 PMA fix */ } diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 152f40d9338..c3bf92c9148 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -513,6 +513,10 @@ blorp_emit_vertex_elements(struct blorp_batch *batch, dw += GENX(VERTEX_ELEMENT_STATE_length); } + blorp_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) { + vf.StatisticsEnable = false; + } + #if GEN_GEN >= 8 /* Overwrite Render Target Array Index (2nd dword) in the VUE header with * primitive instance identifier. This is used for layered clears. diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index e9c85d56d5f..1592e7f7e3d 100644 --- a/src/intel/vulkan/genX_blorp_exec.c +++ b/src/intel/vulkan/genX_blorp_exec.c @@ -258,11 +258,6 @@ genX(blorp_exec)(struct blorp_batch *batch, */ genX(cmd_buffer_enable_pma_fix)(cmd_buffer, false); - /* Disable VF statistics */ - blorp_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) { - vf.StatisticsEnable = false; - } - blorp_exec(batch, params); cmd_buffer->state.gfx.vb_dirty = ~0; diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 9bff2c8ac92..b752294250e 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -614,12 +614,6 @@ brw_upload_invariant_state(struct brw_context *brw) OUT_BATCH(0); ADVANCE_BATCH(); } - - const uint32_t _3DSTATE_VF_STATISTICS = - is_965 ? GEN4_3DSTATE_VF_STATISTICS : GM45_3DSTATE_VF_STATISTICS; - BEGIN_BATCH(1); - OUT_BATCH(_3DSTATE_VF_STATISTICS << 16 | 1); - ADVANCE_BATCH(); } /** diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index e904c4c0cf9..ecffa2e8e86 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -928,6 +928,22 @@ const struct brw_tracked_state genX(cut_index) = { }; #endif +static void +genX(upload_vf_statistics)(struct brw_context *brw) +{ + brw_batch_emit(brw, GENX(3DSTATE_VF_STATISTICS), vf) { + vf.StatisticsEnable = true; + } +} + +const struct brw_tracked_state genX(vf_statistics) = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT, + }, + .emit = genX(upload_vf_statistics), +}; + #if GEN_GEN >= 6 /** * Determine the appropriate attribute override value to store into the @@ -5640,6 +5656,8 @@ genX(init_atoms)(struct brw_context *brw) #if GEN_GEN < 6 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + /* Once all the programs are done, we know how large urb entry * sizes need to be and can decide if we need to change the urb * layout. @@ -5696,6 +5714,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN == 6 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + &genX(sf_clip_viewport), /* Command packets: */ @@ -5760,6 +5780,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN == 7 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + /* Command packets: */ &genX(cc_vp), @@ -5850,6 +5872,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN >= 8 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + &genX(cc_vp), &genX(sf_clip_viewport), -- 2.30.2