From 8c42f631516675df0c62e7907447397de8a7ed73 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sun, 25 Feb 2018 15:05:01 -0500 Subject: [PATCH] freedreno/ir3: small cleanup Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c index 1036d2f967c..38d9ee8e1f0 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c @@ -1475,7 +1475,7 @@ emit_intrinsic_load_shared(struct ir3_context *ctx, nir_intrinsic_instr *intr, unsigned base; offset = get_src(ctx, &intr->src[0])[0]; - base = intr->const_index[0]; + base = nir_intrinsic_base(intr); ldl = ir3_LDL(b, offset, 0, create_immed(b, intr->num_components), 0); ldl->cat6.src_offset = base; @@ -1500,8 +1500,8 @@ emit_intrinsic_store_shared(struct ir3_context *ctx, nir_intrinsic_instr *intr) value = get_src(ctx, &intr->src[0]); offset = get_src(ctx, &intr->src[1])[0]; - base = intr->const_index[0]; - wrmask = intr->const_index[1]; + base = nir_intrinsic_base(intr); + wrmask = nir_intrinsic_write_mask(intr); /* Combine groups of consecutive enabled channels in one write * message. We use ffs to find the first enabled channel and then ffs on -- 2.30.2