From 8c5fd2942b4fb2005b3d01fb4cab86a4162c8a90 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 27 Jan 2020 13:13:20 -0600 Subject: [PATCH] anv: Always fill out the AUX table even if CCS is disabled Cc: "20.0" mesa-stable@lists.freedesktop.org Reviewed-by: Kenneth Graunke Tested-by: Marge Bot Part-of: --- src/intel/common/gen_aux_map.c | 1 - src/intel/common/gen_aux_map.h | 1 + src/intel/vulkan/genX_cmd_buffer.c | 32 ++++++++++++++++-------------- 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/src/intel/common/gen_aux_map.c b/src/intel/common/gen_aux_map.c index 3bb5d0087a9..016161153e8 100644 --- a/src/intel/common/gen_aux_map.c +++ b/src/intel/common/gen_aux_map.c @@ -370,7 +370,6 @@ get_bpp_encoding(uint16_t bpp) } #define GEN_AUX_MAP_ENTRY_Y_TILED_BIT (0x1ull << 52) -#define GEN_AUX_MAP_ENTRY_VALID_BIT 0x1ull uint64_t gen_aux_map_format_bits_for_isl_surf(const struct isl_surf *isl_surf) diff --git a/src/intel/common/gen_aux_map.h b/src/intel/common/gen_aux_map.h index 70c852353dd..70ff34aab5e 100644 --- a/src/intel/common/gen_aux_map.h +++ b/src/intel/common/gen_aux_map.h @@ -45,6 +45,7 @@ struct gen_device_info; #define GEN_AUX_MAP_ADDRESS_MASK 0x0000ffffffffff00ull #define GEN_AUX_MAP_FORMAT_BITS_MASK 0xfff0000000000000ull +#define GEN_AUX_MAP_ENTRY_VALID_BIT 0x1ull #define GEN_AUX_MAP_GEN12_CCS_SCALE 256 #define GEN_AUX_MAP_MAIN_PAGE_SIZE (64 * 1024) #define GEN_AUX_MAP_AUX_PAGE_SIZE \ diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 2b3c285d4a2..608e2a06f6c 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -1009,7 +1009,6 @@ anv_image_init_aux_tt(struct anv_cmd_buffer *cmd_buffer, uint32_t base_layer, uint32_t layer_count) { uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect); - assert(isl_aux_usage_has_ccs(image->planes[plane].aux_usage)); uint64_t base_address = anv_address_physical(image->planes[plane].address); @@ -1025,6 +1024,9 @@ anv_image_init_aux_tt(struct anv_cmd_buffer *cmd_buffer, cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_CS_STALL_BIT; genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); + struct gen_mi_builder b; + gen_mi_builder_init(&b, &cmd_buffer->batch); + for (uint32_t a = 0; a < layer_count; a++) { const uint32_t layer = base_layer + a; @@ -1069,24 +1071,25 @@ anv_image_init_aux_tt(struct anv_cmd_buffer *cmd_buffer, offset < end_offset_B; offset += 64 * 1024) { uint64_t address = base_address + offset; - uint64_t aux_entry_address, *aux_entry_map; + uint64_t aux_entry_addr64, *aux_entry_map; aux_entry_map = gen_aux_map_get_entry(cmd_buffer->device->aux_map_ctx, - address, &aux_entry_address); + address, &aux_entry_addr64); + + assert(cmd_buffer->device->physical->use_softpin); + struct anv_address aux_entry_address = { + .bo = NULL, + .offset = aux_entry_addr64, + }; const uint64_t old_aux_entry = READ_ONCE(*aux_entry_map); uint64_t new_aux_entry = - (old_aux_entry & ~GEN_AUX_MAP_FORMAT_BITS_MASK) | format_bits; + (old_aux_entry & GEN_AUX_MAP_ADDRESS_MASK) | format_bits; - /* We're only going to update the top 32 bits */ - assert((uint32_t)old_aux_entry == (uint32_t)new_aux_entry); + if (isl_aux_usage_has_ccs(image->planes[plane].aux_usage)) + new_aux_entry |= GEN_AUX_MAP_ENTRY_VALID_BIT; - anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) { - sdi.Address = (struct anv_address) { - .bo = NULL, - .offset = aux_entry_address + 4, - }; - sdi.ImmediateData = new_aux_entry >> 32; - } + gen_mi_store(&b, gen_mi_mem64(aux_entry_address), + gen_mi_imm(new_aux_entry)); } } @@ -1165,8 +1168,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer, if (initial_layout == VK_IMAGE_LAYOUT_UNDEFINED || initial_layout == VK_IMAGE_LAYOUT_PREINITIALIZED) { #if GEN_GEN == 12 - if (isl_aux_usage_has_ccs(image->planes[plane].aux_usage) && - device->physical->has_implicit_ccs && devinfo->has_aux_map) { + if (device->physical->has_implicit_ccs && devinfo->has_aux_map) { anv_image_init_aux_tt(cmd_buffer, image, aspect, base_level, level_count, base_layer, layer_count); -- 2.30.2