From 8c75cd8243f9964516eae14013ebbba23a63403b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 13 Sep 2019 04:46:05 +0100 Subject: [PATCH] update VL format --- simple_v_extension/vblock_format_table.mdwn | 3 +++ 1 file changed, 3 insertions(+) diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn index a0c258eb7..2c274a727 100644 --- a/simple_v_extension/vblock_format_table.mdwn +++ b/simple_v_extension/vblock_format_table.mdwn @@ -23,6 +23,9 @@ The VL/MAXVL/SubVL Block format, when 16xil != 0b111, is: Note (1) - Registers are in RVC format (x8-x15) +Note (2) - [[specification/sv.setvl]] behaviour is expected, as if an sv.setvl +instruction had actually been called. + When 16xil is 0b111, this is the "Extended" Format, using the >= 192-bit RISC-V ISA format. Note that the length is 96+16\*nnnnn, not 192+ -- 2.30.2