From 8ca8e005622185ec47479a77828517b29e4791b7 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:30:00 +0100 Subject: [PATCH] added english language description for lhasux instruction --- openpower/isa/fixedloadshift.mdwn | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index a82c7100..897ec052 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -166,6 +166,18 @@ Pseudo-code: RT <- EXTS(MEM(EA, 2)) RA <- EA +Description: + + Let the effective address (EA) be the sum of the contents of + register (RB) shifted by (SH+1), and (RA). + + The halfword in storage addressed by EA is loaded into RT[48:63]. + RT[0:47] are filled with a copy of bit 0 of the loaded halfword. + + EA is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None -- 2.30.2