From 8d02916e0c083f57bc7dfd886333f099763bd998 Mon Sep 17 00:00:00 2001 From: Anuj Phogat Date: Tue, 6 Jun 2017 16:14:19 -0700 Subject: [PATCH] intel: Fix broxton 2x6 way size computation This patch is undoing the changes to way size computation in broxton 2x6, made by below commit: Commit: 0d576fbfbe912cf3fb9ab594bb31eb58bccf2138 Author: Anuj Phogat i965: Simplify l3 way size computations By making use of l3_banks field in gen_device_info struct l3_way_size for gen7+ = 2 * l3_banks. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101306 Signed-off-by: Anuj Phogat Tested-by: Mark Janes Acked-by: Kenneth Graunke --- src/intel/common/gen_l3_config.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c index e0825e92d9f..2520838e7d9 100644 --- a/src/intel/common/gen_l3_config.c +++ b/src/intel/common/gen_l3_config.c @@ -255,6 +255,10 @@ static unsigned get_l3_way_size(const struct gen_device_info *devinfo) { assert(devinfo->l3_banks); + + if (devinfo->is_broxton) + return 4; + return 2 * devinfo->l3_banks; } -- 2.30.2