From 8d9ab0a33bb17a7f2eebe4369d8b130548ecbac4 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 26 Aug 2020 14:57:52 -0700 Subject: [PATCH] freedreno/a5xx+a6xx: use sysmem path for nondraw batches For prologue's in the nondraw path, we need a "gmem" rb that we can emit the IB to the prologue before the main part of the batch. This has the side benefit of cleaning up a bunch of duplicate setup code in a5xx. Signed-off-by: Rob Clark Part-of: --- .../drivers/freedreno/a5xx/fd5_blitter.c | 20 ------------ .../drivers/freedreno/a5xx/fd5_compute.c | 31 ------------------- src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 17 ++++++---- .../drivers/freedreno/a6xx/fd6_blitter.c | 3 -- .../drivers/freedreno/a6xx/fd6_compute.c | 2 -- src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 7 ++++- .../drivers/freedreno/freedreno_batch.c | 15 +++++---- .../drivers/freedreno/freedreno_gmem.c | 2 ++ 8 files changed, 26 insertions(+), 71 deletions(-) diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c index a2db58734c7..53fbb77b092 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c @@ -153,23 +153,6 @@ can_do_blit(const struct pipe_blit_info *info) static void emit_setup(struct fd_ringbuffer *ring) { - OUT_PKT7(ring, CP_EVENT_WRITE, 1); - OUT_RING(ring, LRZ_FLUSH); - - OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); - OUT_RING(ring, 0x0); - - OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); - OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ - - OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1); - OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ - - /* 0x10000000 for BYPASS.. 0x7c13c080 for GMEM: */ - OUT_WFI5(ring); - OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); - OUT_RING(ring, 0x10000000); /* RB_CCU_CNTL */ - OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); OUT_RING(ring, 0x00000008); @@ -459,9 +442,6 @@ fd5_blitter_blit(struct fd_context *ctx, const struct pipe_blit_info *info) batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true); - fd5_emit_restore(batch, batch->draw); - fd5_emit_lrz_flush(batch->draw); - emit_setup(batch->draw); if ((info->src.resource->target == PIPE_BUFFER) && diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c index e12f5dfdff3..20752acb8c9 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c @@ -149,35 +149,6 @@ cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v, fd5_emit_shader(ring, v); } -static void -emit_setup(struct fd_context *ctx) -{ - struct fd_ringbuffer *ring = ctx->batch->draw; - - fd5_emit_restore(ctx->batch, ring); - fd5_emit_lrz_flush(ring); - - OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); - OUT_RING(ring, 0x0); - - OUT_PKT7(ring, CP_EVENT_WRITE, 1); - OUT_RING(ring, PC_CCU_INVALIDATE_COLOR); - - OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); - OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ - - OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1); - OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ - - /* 0x10000000 for BYPASS.. 0x7c13c080 for GMEM: */ - fd_wfi(ctx->batch, ring); - OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); - OUT_RING(ring, 0x10000000); /* RB_CCU_CNTL */ - - OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); - OUT_RING(ring, A5XX_RB_CNTL_BYPASS); -} - static void fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info) { @@ -187,8 +158,6 @@ fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info) struct fd_ringbuffer *ring = ctx->batch->draw; unsigned nglobal = 0; - emit_setup(ctx); - v = ir3_shader_variant(so->shader, key, false, &ctx->debug); if (!v) return; diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index b574bcd880d..1b7b54701f2 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -693,7 +693,6 @@ fd5_emit_tile_fini(struct fd_batch *batch) static void fd5_emit_sysmem_prep(struct fd_batch *batch) { - struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd_ringbuffer *ring = batch->gmem; fd5_emit_restore(batch, ring); @@ -720,6 +719,17 @@ fd5_emit_sysmem_prep(struct fd_batch *batch) OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); OUT_RING(ring, 0x10000000); /* RB_CCU_CNTL */ + OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); + OUT_RING(ring, A5XX_RB_CNTL_WIDTH(0) | + A5XX_RB_CNTL_HEIGHT(0) | + A5XX_RB_CNTL_BYPASS); + + /* remaining setup below here does not apply to blit/compute: */ + if (batch->nondraw) + return; + + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2); OUT_RING(ring, A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(0) | A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(0)); @@ -739,11 +749,6 @@ fd5_emit_sysmem_prep(struct fd_batch *batch) OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1); OUT_RING(ring, 0x1); - OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); - OUT_RING(ring, A5XX_RB_CNTL_WIDTH(0) | - A5XX_RB_CNTL_HEIGHT(0) | - A5XX_RB_CNTL_BYPASS); - patch_draws(batch, IGNORE_VISIBILITY); emit_zs(ring, pfb->zsbuf, NULL); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c index 8b2894e48e4..767b55698ee 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c @@ -698,9 +698,6 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info) batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true); - fd6_emit_restore(batch, batch->draw); - fd6_emit_lrz_flush(batch->draw); - fd_screen_lock(ctx->screen); fd_batch_resource_read(batch, fd_resource(info->src.resource)); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_compute.c b/src/gallium/drivers/freedreno/a6xx/fd6_compute.c index 75d4b965f6f..6faf2de8f40 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_compute.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_compute.c @@ -140,8 +140,6 @@ fd6_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info) struct fd_ringbuffer *ring = ctx->batch->draw; unsigned nglobal = 0; - fd6_emit_restore(ctx->batch, ring); - v = ir3_shader_variant(so->shader, key, false, &ctx->debug); if (!v) return; diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index 32ea772a5bc..b8c289e600c 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -1360,7 +1360,6 @@ setup_tess_buffers(struct fd_batch *batch, struct fd_ringbuffer *ring) static void fd6_emit_sysmem_prep(struct fd_batch *batch) { - struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd_ringbuffer *ring = batch->gmem; fd6_emit_restore(batch, ring); @@ -1372,6 +1371,12 @@ fd6_emit_sysmem_prep(struct fd_batch *batch) fd_log(batch, "END PROLOGUE"); } + /* remaining setup below here does not apply to blit/compute: */ + if (batch->nondraw) + return; + + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + if (pfb->width > 0 && pfb->height > 0) set_scissor(ring, 0, 0, pfb->width - 1, pfb->height - 1); else diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c b/src/gallium/drivers/freedreno/freedreno_batch.c index 1a93a8272c9..54f8601d499 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.c +++ b/src/gallium/drivers/freedreno/freedreno_batch.c @@ -64,7 +64,8 @@ batch_init(struct fd_batch *batch) batch->submit = fd_submit_new(ctx->pipe); if (batch->nondraw) { - batch->draw = alloc_ring(batch, 0x100000, FD_RINGBUFFER_PRIMARY); + batch->gmem = alloc_ring(batch, 0x1000, FD_RINGBUFFER_PRIMARY); + batch->draw = alloc_ring(batch, 0x100000, 0); } else { batch->gmem = alloc_ring(batch, 0x100000, FD_RINGBUFFER_PRIMARY); batch->draw = alloc_ring(batch, 0x100000, 0); @@ -155,13 +156,11 @@ batch_fini(struct fd_batch *batch) fd_fence_ref(&batch->fence, NULL); fd_ringbuffer_del(batch->draw); - if (!batch->nondraw) { - if (batch->binning) - fd_ringbuffer_del(batch->binning); - fd_ringbuffer_del(batch->gmem); - } else { - debug_assert(!batch->binning); - debug_assert(!batch->gmem); + fd_ringbuffer_del(batch->gmem); + + if (batch->binning) { + fd_ringbuffer_del(batch->binning); + batch->binning = NULL; } if (batch->prologue) { diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c index 457a5c8f76c..7f6d330d319 100644 --- a/src/gallium/drivers/freedreno/freedreno_gmem.c +++ b/src/gallium/drivers/freedreno/freedreno_gmem.c @@ -603,6 +603,7 @@ render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem) } else { ctx->screen->emit_ib(batch->gmem, batch->draw); } + fd_log(batch, "TILE[%d]: END DRAW IB", i); fd_reset_wfi(batch); @@ -711,6 +712,7 @@ fd_gmem_render_tiles(struct fd_batch *batch) if (batch->nondraw) { DBG("%p: rendering non-draw", batch); + render_sysmem(batch); ctx->stats.batch_nondraw++; } else if (sysmem) { fd_log(batch, "%p: rendering sysmem %ux%u (%s/%s), num_draws=%u", -- 2.30.2