From 8db49ae69ac439090efb6337e901fe3f8d82ee8d Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 29 Nov 2020 18:20:04 +0000 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index 7a0d2ef80..223071488 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -23,7 +23,7 @@ Purpose: | 0-5 | 6-10 | 11 | 12-15 | 16-18 | 19-20 | 21-30 | 31 | | 19 | RT | 0 | mask | BB | m2 | XO | / | - | 19 | RT | 1 | mask | BB | m2 | XO | / | + | 19 | RA | 1 | mask | BB | m2 | XO | / | mode is encoded in XO and from m2 to produce 4 bits @@ -43,7 +43,7 @@ bit 11=1: mfcrweird: RA, BB, mask.mode reg = GPR(RA|0) - n0 = mask[1] & (mode[0] == reg[0]]) + n0 = mask[1] & (mode[0] == reg[0]) n1 = mask[1] & (mode[1] == reg[0]) n2 = mask[2] & (mode[2] == reg[0]) n3 = mask[3] & (mode[3] == reg[0]) -- 2.30.2