From 8dfee57bdc165c3d4c315eac91b60112969433e2 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 28 May 2020 17:14:30 -0500 Subject: [PATCH] spirv: Clean up OpSignBitSet For some reason, we were doing a signed shift vectors and an unsigned shift for scalars. We then plug it into i2b so it should make no difference whatsoever. The fact that we're doing different things for vectors vs. scalars is bonkers. Let's simplify the code a bit. Reviewed-by: Caio Marcelo de Oliveira Filho Part-of: --- src/compiler/spirv/vtn_alu.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c index e78f74576bb..611f186c301 100644 --- a/src/compiler/spirv/vtn_alu.c +++ b/src/compiler/spirv/vtn_alu.c @@ -646,18 +646,10 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode, break; } - case SpvOpSignBitSet: { - unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type); - if (src[0]->num_components == 1) - val->ssa->def = - nir_ushr(&b->nb, src[0], nir_imm_int(&b->nb, src_bit_size - 1)); - else - val->ssa->def = - nir_ishr(&b->nb, src[0], nir_imm_int(&b->nb, src_bit_size - 1)); - - val->ssa->def = nir_i2b(&b->nb, val->ssa->def); + case SpvOpSignBitSet: + val->ssa->def = nir_i2b(&b->nb, + nir_ushr(&b->nb, src[0], nir_imm_int(&b->nb, src[0]->bit_size - 1))); break; - } case SpvOpUCountTrailingZerosINTEL: val->ssa->def = nir_umin(&b->nb, -- 2.30.2