From 8e10302e3f67cad4f4dbf294d260fac49d97cf36 Mon Sep 17 00:00:00 2001 From: Rainer Orth Date: Mon, 24 Oct 2016 08:07:27 +0000 Subject: [PATCH] Work around 32-bit i386 STV testcases failing with -mstackrealign (PR target/77483) PR target/77483 * gcc.target/i386/mask-unpack.c (dg-options): Add -mno-stackrealign. * gcc.target/i386/pr65105-1.c: Likewise. * gcc.target/i386/pr65105-2.c: Likewise. * gcc.target/i386/pr65105-3.c: Likewise. * gcc.target/i386/pr65105-5.c: Likewise. * gcc.target/i386/pr67761.c: Likewise. * gcc.target/i386/pr70799-1.c: Likewise. From-SVN: r241464 --- gcc/testsuite/ChangeLog | 11 +++++++++++ gcc/testsuite/gcc.target/i386/mask-unpack.c | 2 +- gcc/testsuite/gcc.target/i386/pr65105-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr65105-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr65105-3.c | 2 +- gcc/testsuite/gcc.target/i386/pr65105-5.c | 2 +- gcc/testsuite/gcc.target/i386/pr67761.c | 2 +- gcc/testsuite/gcc.target/i386/pr70799-1.c | 2 +- 8 files changed, 18 insertions(+), 7 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 97fca4001cd..f49a4c96ded 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2016-10-24 Rainer Orth + + PR target/77483 + * gcc.target/i386/mask-unpack.c (dg-options): Add -mno-stackrealign. + * gcc.target/i386/pr65105-1.c: Likewise. + * gcc.target/i386/pr65105-2.c: Likewise. + * gcc.target/i386/pr65105-3.c: Likewise. + * gcc.target/i386/pr65105-5.c: Likewise. + * gcc.target/i386/pr67761.c: Likewise. + * gcc.target/i386/pr70799-1.c: Likewise. + 2016-10-24 Martin Liska PR sanitizer/77966 diff --git a/gcc/testsuite/gcc.target/i386/mask-unpack.c b/gcc/testsuite/gcc.target/i386/mask-unpack.c index 5905e1cf00f..4291480cfff 100644 --- a/gcc/testsuite/gcc.target/i386/mask-unpack.c +++ b/gcc/testsuite/gcc.target/i386/mask-unpack.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx512bw -mavx512dq -O3 -fopenmp-simd -fdump-tree-vect-details" } */ +/* { dg-options "-mavx512bw -mavx512dq -mno-stackrealign -O3 -fopenmp-simd -fdump-tree-vect-details" } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 10 "vect" } } */ /* { dg-final { scan-assembler-not "maskmov" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-1.c b/gcc/testsuite/gcc.target/i386/pr65105-1.c index de91a20e238..b0d901c90bd 100644 --- a/gcc/testsuite/gcc.target/i386/pr65105-1.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-1.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do run { target { ia32 } } } */ -/* { dg-options "-O2 -msse2 -mtune=slm -save-temps" } */ +/* { dg-options "-O2 -msse2 -mtune=slm -mno-stackrealign -save-temps" } */ /* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "por" } } */ /* { dg-final { scan-assembler "pand" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-2.c b/gcc/testsuite/gcc.target/i386/pr65105-2.c index 607c9abab6a..0c3626bbf5b 100644 --- a/gcc/testsuite/gcc.target/i386/pr65105-2.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-2.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -msse2" } */ +/* { dg-options "-O2 -msse2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "por" } } */ long long i1, i2, res; diff --git a/gcc/testsuite/gcc.target/i386/pr65105-3.c b/gcc/testsuite/gcc.target/i386/pr65105-3.c index b83989fa4d2..92d62f5da2b 100644 --- a/gcc/testsuite/gcc.target/i386/pr65105-3.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-3.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm -msse4.2" } */ +/* { dg-options "-O2 -march=slm -msse4.2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "pand" } } */ /* { dg-final { scan-assembler "por" } } */ /* { dg-final { scan-assembler "ptest" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-5.c b/gcc/testsuite/gcc.target/i386/pr65105-5.c index 639bbe1eb14..cd19cbc775d 100644 --- a/gcc/testsuite/gcc.target/i386/pr65105-5.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-5.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=core-avx2" } */ +/* { dg-options "-O2 -march=core-avx2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "pandn" } } */ /* { dg-final { scan-assembler "pxor" } } */ /* { dg-final { scan-assembler "ptest" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67761.c b/gcc/testsuite/gcc.target/i386/pr67761.c index ff813f3f8b5..f392b5d7bf6 100644 --- a/gcc/testsuite/gcc.target/i386/pr67761.c +++ b/gcc/testsuite/gcc.target/i386/pr67761.c @@ -1,6 +1,6 @@ /* PR target/pr67761 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm -g" } */ +/* { dg-options "-O2 -march=slm -mno-stackrealign -g" } */ /* { dg-final { scan-assembler "paddq" } } */ void diff --git a/gcc/testsuite/gcc.target/i386/pr70799-1.c b/gcc/testsuite/gcc.target/i386/pr70799-1.c index f4e42fac5a0..5860a8dc620 100644 --- a/gcc/testsuite/gcc.target/i386/pr70799-1.c +++ b/gcc/testsuite/gcc.target/i386/pr70799-1.c @@ -1,6 +1,6 @@ /* PR target/pr70799 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm" } */ +/* { dg-options "-O2 -march=slm -mno-stackrealign" } */ /* { dg-final { scan-assembler "pxor" } } */ /* { dg-final { scan-assembler "pcmpeqd" } } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+.?LC0" } } */ -- 2.30.2