From 8e5b251fbbd811850c4f4427862e4e9573cc7dae Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 17 Nov 2023 15:31:08 +0000 Subject: [PATCH] Added English language description for lhzupsx instruction --- openpower/isa/pifixedloadshift.mdwn | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openpower/isa/pifixedloadshift.mdwn b/openpower/isa/pifixedloadshift.mdwn index 7ef2cbbb..d2a4445d 100644 --- a/openpower/isa/pifixedloadshift.mdwn +++ b/openpower/isa/pifixedloadshift.mdwn @@ -25,8 +25,8 @@ Pseudo-code: Description: - Let the effective address (EA) be the sum of the contents of - register RB shifted by (SH+1), and the contents of register RA. + Let the effective address (EA) be the contents of + register RA shifted by (SH+1). The byte in storage addressed by EA is loaded into RT[56:63]. RT[0:55] are set to 0. @@ -43,11 +43,11 @@ Special Registers Altered: Z23-Form -* lhzupsx RT,RA,RB +* lhzupsx RT,RA,RB,SH Pseudo-code: - EA <- (RA) + EA <- (RA)<<(SH+1) RT <- ([0] * (XLEN-16)) || MEM(EA, 2) RA <- (RA) + (RB) -- 2.30.2