From 8e5e4b3e7b64b73f8f6205bb82c025db04691f49 Mon Sep 17 00:00:00 2001 From: Tobias Platen Date: Tue, 18 Aug 2020 19:50:43 +0200 Subject: [PATCH] add testcase for LDSTSplitter using PortInterface --- .../experiment/test/test_l0_cache_buffer2.py | 35 ++++++++++++++++--- 1 file changed, 30 insertions(+), 5 deletions(-) diff --git a/src/soc/experiment/test/test_l0_cache_buffer2.py b/src/soc/experiment/test/test_l0_cache_buffer2.py index 33c6355f..ae1ae7e8 100644 --- a/src/soc/experiment/test/test_l0_cache_buffer2.py +++ b/src/soc/experiment/test/test_l0_cache_buffer2.py @@ -1,10 +1,15 @@ """ -TODO +test cases for LDSTSplitter and L0CacheBuffer2 """ from soc.experiment.l0_cache import L0CacheBuffer2 from nmigen import Module from nmigen.cli import rtlil +from soc.scoreboard.addr_split import LDSTSplitter +from soc.scoreboard.addr_match import LenExpand + +from soc.config.test.test_pi2ls import pi_ld, pi_st, pi_ldst + #cxxsim = False #if cxxsim: # from nmigen.sim.cxxsim import Simulator, Settle @@ -12,19 +17,39 @@ from nmigen.cli import rtlil # from nmigen.back.pysim import Simulator, Settle from nmigen.compat.sim import run_simulation, Settle -def test_cache_run(dut): +def writeMulti(dut): + for i in range(dut.n_units): + yield dut.dports[i].is_st_i.eq(1) + yield dut.dports[i].addr.data.eq(i) yield + # TODO assert that outputs are valid + +def test_cache_run(dut): + yield from writeMulti(dut) + +def test_cache_single_run(dut): + #test single byte + addr = 0 + data = 0xfeedface + yield from pi_st(dut.pi, addr, data, 1) def test_cache(): dut = L0CacheBuffer2() #vl = rtlil.convert(dut, ports=dut.ports()) - # with open("test_data_merger.il", "w") as f: + #with open("test_data_merger.il", "w") as f: # f.write(vl) run_simulation(dut, test_cache_run(dut), vcd_name='test_cache.vcd') +def test_cache_single(): + dut = LDSTSplitter(8, 48, 4) #data leng in bytes, address bits, select bits + + run_simulation(dut, test_cache_single_run(dut), + vcd_name='test_cache_single.vcd') + + if __name__ == '__main__': - test_cache() - #TODO make debug output optional + #test_cache() + test_cache_single() -- 2.30.2