From 8ee0e41c47aba5d50eb3b195476251b2592cefc6 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 11:31:02 +0100
Subject: [PATCH] Added english language description, spaces and brackets for
 lwzx instruction

---
 openpower/isa/fixedload.mdwn | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 1199024d..f2339b89 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -351,6 +351,12 @@ Pseudo-code:
     EA <- b + (RB)
     RT <- [0] * 32 || MEM(EA, 4)
 
+Description:
+
+    Let the effective address (EA) be the sum
+    (RA|0)+ (RB). The word in storage addressed by EA is
+    loaded into RT[32:63] . RT[0:31] are set to 0.
+
 Special Registers Altered:
 
     None
-- 
2.30.2