From 8f6a79e57c6705d256bdd9770ae08de2981c72a2 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 20 Jan 2022 18:38:20 +0000 Subject: [PATCH] whoops MFSPR DEC/TB was reading from FastRegs not StateRegs also TBU --- src/soc/fu/spr/main_stage.py | 12 ++++++------ src/soc/simple/core.py | 3 ++- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/src/soc/fu/spr/main_stage.py b/src/soc/fu/spr/main_stage.py index 2183f1e9..3e236a28 100644 --- a/src/soc/fu/spr/main_stage.py +++ b/src/soc/fu/spr/main_stage.py @@ -56,12 +56,12 @@ class SPRMainStage(PipeModBase): #### MTSPR #### with m.Case(MicrOp.OP_MTSPR): with m.Switch(spr): - # fast SPRs first + # State SPRs first with m.Case(SPR.DEC, SPR.TB): comb += state1_o.data.eq(a_i) comb += state1_o.ok.eq(1) - # state SPRs second: anything in FAST regs + # Fast SPRs second: anything in FAST regs with m.Case(SPR.CTR, SPR.LR, SPR.TAR, SPR.SRR0, SPR.SRR1, SPR.XER, SPR.HSRR0, SPR.HSRR1, SPR.SPRG0_priv, SPR.SPRG1_priv, @@ -94,7 +94,10 @@ class SPRMainStage(PipeModBase): with m.Switch(spr): # state SPRs first with m.Case(SPR.DEC, SPR.TB): - comb += o.data.eq(fast1_i) + comb += o.data.eq(state1_i) + # TBU is upper 32-bits of State Reg + with m.Case(SPR.TBU): + comb += o.data[0:32].eq(state1_i[32:64]) # fast SPRs second with m.Case(SPR.CTR, SPR.LR, SPR.TAR, SPR.SRR0, @@ -116,9 +119,6 @@ class SPRMainStage(PipeModBase): # carry comb += o[63-XER_bits['CA']].eq(ca_i[0]) comb += o[63-XER_bits['CA32']].eq(ca_i[1]) - with m.Case(SPR.TBU): - comb += o.data[0:32].eq(fast1_i[32:64]) - # slow SPRs TODO with m.Default(): comb += o.data.eq(spr1_i) diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index d9c398b4..6c2d7388 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -523,7 +523,8 @@ class NonProductionCore(ControlBase): # spot MTSPR, spot that DEC/TB is what is to be updated. # a job for PowerDecoder2, there if funame.lower().startswith('spr'): - with m.If(fu.busy_o): + with m.If(fu.busy_o #& fu.oper_i.insn_type == OP_MTSPR + ): comb += self.pause_dec_tb.eq(1) # return both the function unit "enable" dict as well as the "busy". -- 2.30.2