From 8fc06589cbf28b2a5bf13384d1c683dc50f68a8a Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Thu, 23 Feb 2006 13:51:54 -0500 Subject: [PATCH] Update functional memory to have a response event Clean out old memory python files, move them into old_mem directory. Maybe we should just delete them, they are under revision control. Add new py files for new objects. SConscript: Update because memory is just a header file now base/chunk_generator.hh: Make Chunk Generator return the entire size if the chunk_size is set to zero. Useful when trying to chunck on blocksize of memory, which can write large pieces of data. cpu/simple/cpu.cc: Make sure to delete the pkt. mem/physical.cc: mem/physical.hh: Set up response event. mem/port.cc: Rename rqst to req to conform to same standard naming convention. python/m5/objects/PhysicalMemory.py: Update the params, inheritence --HG-- extra : convert_revision : 857154ec256522baf423b715833930497999549b --- SConscript | 1 - base/chunk_generator.hh | 17 +++++++++++----- cpu/simple/cpu.cc | 2 ++ mem/physical.cc | 30 ++++++++++++++++++++++++++++- mem/physical.hh | 15 ++++++++++++--- mem/port.cc | 8 ++++---- python/m5/objects/MemObject.py | 5 +++++ python/m5/objects/PhysicalMemory.py | 4 ++-- 8 files changed, 66 insertions(+), 16 deletions(-) create mode 100644 python/m5/objects/MemObject.py diff --git a/SConscript b/SConscript index 1c13a9307..078b1e831 100644 --- a/SConscript +++ b/SConscript @@ -91,7 +91,6 @@ base_sources = Split(''' cpu/static_inst.cc cpu/sampler/sampler.cc - mem/memory.cc mem/page_table.cc mem/physical.cc mem/port.cc diff --git a/base/chunk_generator.hh b/base/chunk_generator.hh index 83caaca88..afd577814 100644 --- a/base/chunk_generator.hh +++ b/base/chunk_generator.hh @@ -82,11 +82,18 @@ class ChunkGenerator // set up initial chunk. curAddr = startAddr; - // nextAddr should be *next* chunk start - nextAddr = roundUp(startAddr, chunkSize); - if (curAddr == nextAddr) { - // ... even if startAddr is already chunk-aligned - nextAddr += chunkSize; + if (chunkSize == 0) //Special Case, if we see 0, assume no chuncking + { + nextAddr = startAddr + totalSize; + } + else + { + // nextAddr should be *next* chunk start + nextAddr = roundUp(startAddr, chunkSize); + if (curAddr == nextAddr) { + // ... even if startAddr is already chunk-aligned + nextAddr += chunkSize; + } } // how many bytes are left between curAddr and the end of this chunk? diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index 469fad270..c34cf9079 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -674,6 +674,8 @@ SimpleCPU::sendIcacheRequest() icacheStallCycles += latency; _status = IcacheAccessComplete; + + delete pkt; #endif } diff --git a/mem/physical.cc b/mem/physical.cc index beebb65c8..58c9ea408 100644 --- a/mem/physical.cc +++ b/mem/physical.cc @@ -46,11 +46,31 @@ #include "mem/physical.hh" #include "sim/host.hh" #include "sim/builder.hh" +#include "sim/eventq.hh" #include "targetarch/isa_traits.hh" using namespace std; +PhysicalMemory::MemResponseEvent::MemResponseEvent(Packet &pkt, MemoryPort* _m) + : Event(&mainEventQueue, CPU_Tick_Pri), pkt(pkt), memoryPort(_m) +{ + + this->setFlags(AutoDelete); +} + +void +PhysicalMemory::MemResponseEvent::process() +{ + memoryPort->sendTiming(pkt); +} + +const char * +PhysicalMemory::MemResponseEvent::description() +{ + return "Physical Memory Timing Access respnse event"; +} + #if FULL_SYSTEM PhysicalMemory::PhysicalMemory(const string &n, Range range, MemoryController *mmu, const std::string &fname) @@ -157,7 +177,10 @@ bool PhysicalMemory::doTimingAccess (Packet &pkt) { doFunctionalAccess(pkt); - //Schedule a response event at curTick + lat; + + MemResponseEvent* response = new MemResponseEvent(pkt, &memoryPort); + response->schedule(curTick + lat); + return true; } @@ -213,6 +236,11 @@ PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &range_list, panic("??"); } +int +PhysicalMemory::MemoryPort::deviceBlockSize() +{ + return memory->deviceBlockSize(); +} bool PhysicalMemory::MemoryPort::recvTiming(Packet &pkt) diff --git a/mem/physical.hh b/mem/physical.hh index bac7e3d46..b31e45ac5 100644 --- a/mem/physical.hh +++ b/mem/physical.hh @@ -35,6 +35,8 @@ #include "base/range.hh" #include "mem/memory.hh" #include "mem/packet.hh" +#include "mem/port.hh" +#include "sim/eventq.hh" // // Functional model for a contiguous block of physical memory. (i.e. RAM) @@ -63,7 +65,6 @@ class PhysicalMemory : public Memory bool &owner); virtual int deviceBlockSize(); - }; MemoryPort memoryPort; @@ -72,7 +73,15 @@ class PhysicalMemory : public Memory int lat; - //event to send response needs to be here + struct MemResponseEvent : public Event + { + Packet pkt; + MemoryPort *memoryPort; + + MemResponseEvent(Packet &pkt, MemoryPort *memoryPort); + void process(); + const char *description(); + }; private: // prevent copying of a MainMemory object @@ -98,7 +107,7 @@ class PhysicalMemory : public Memory void prot_access_error(Addr addr, int size, Command func); public: - virtual int deviceBlockSize(); + int deviceBlockSize(); void prot_memset(Addr addr, uint8_t val, int size); diff --git a/mem/port.cc b/mem/port.cc index 640b72a0e..8c4b3810c 100644 --- a/mem/port.cc +++ b/mem/port.cc @@ -36,15 +36,15 @@ void Port::blobHelper(Addr addr, uint8_t *p, int size, Command cmd) { - Request rqst; + Request req; Packet pkt; - pkt.req = &rqst; + pkt.req = &req; pkt.cmd = cmd; for (ChunkGenerator gen(addr, size, peerBlockSize()); !gen.done(); gen.next()) { - pkt.addr = rqst.paddr = gen.addr(); - pkt.size = rqst.size = gen.size(); + pkt.addr = req.paddr = gen.addr(); + pkt.size = req.size = gen.size(); pkt.data = p; sendFunctional(pkt); p += gen.size(); diff --git a/python/m5/objects/MemObject.py b/python/m5/objects/MemObject.py new file mode 100644 index 000000000..4d68243e6 --- /dev/null +++ b/python/m5/objects/MemObject.py @@ -0,0 +1,5 @@ +from m5 import * + +class MemObject(SimObject): + type = 'MemObject' + abstract = True diff --git a/python/m5/objects/PhysicalMemory.py b/python/m5/objects/PhysicalMemory.py index f50937ee6..ab2714a6f 100644 --- a/python/m5/objects/PhysicalMemory.py +++ b/python/m5/objects/PhysicalMemory.py @@ -1,7 +1,7 @@ from m5 import * -from FunctionalMemory import FunctionalMemory +from Memory import Memory -class PhysicalMemory(FunctionalMemory): +class PhysicalMemory(Memory): type = 'PhysicalMemory' range = Param.AddrRange("Device Address") file = Param.String('', "memory mapped file") -- 2.30.2