From 900b141682699099ed4a868d7d82899164095758 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 3 Jun 2021 16:36:40 +0100 Subject: [PATCH] comment out domains that have already been created --- src/soc/simple/issuer.py | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index 4f559ce1..1245a6c4 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -1292,6 +1292,11 @@ class TestIssuer(Elaboratable): # internal clock is set to selector clock-out. has the side-effect of # running TestIssuer at this speed (see DomainRenamer("intclk") above) # debug clock runs at coresync internal clock + cd_coresync = ClockDomain("coresync") + #m.domains += cd_coresync + if self.ti.dbg_domain != 'sync': + cd_dbgsync = ClockDomain("dbgsync") + #m.domains += cd_dbgsync intclk = ClockSignal("coresync") dbgclk = ClockSignal(self.ti.dbg_domain) # XXX BYPASS PLL XXX -- 2.30.2