From 90757b8afdcda3b9fd5a0fe99eb314848e34275f Mon Sep 17 00:00:00 2001
From: Brendan Kehoe <brendan@cygnus>
Date: Sat, 30 Jan 1999 05:11:51 +0000
Subject: [PATCH] fix use of sanitize to be sanitise to avoid hiccups

---
 opcodes/Makefile.am | 10 +++++-----
 opcodes/Makefile.in | 10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index c9b33041d5e..9691ad57907 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -195,7 +195,7 @@ CGENFILES = $(CGENDIR)/cos.scm $(CGENDIR)/utils.scm \
 	$(CGENDIR)/opcodes.scm $(CGENDIR)/cgen-opc.scm \
 	cgen-opc.in cgen-asm.in cgen-dis.in
 # The CGEN_MAINT conditional is put here so it ends up in Makefile.in
-# properly sanitized.
+# properly sanitised.
 if CGEN_MAINT
 M32R_DEPS = stamp-m32r
 FR30_DEPS = stamp-fr30
@@ -210,7 +210,7 @@ ENDSAN = end-sanitize-cygnus
 
 # start-sanitize-cygnus
 run-cgen:
-	$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix)
+	$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix) $(options)
 	touch stamp-${prefix}
 .PHONY: run-cgen
 
@@ -218,19 +218,19 @@ run-cgen:
 m32r-opc.h m32r-opc.c m32r-asm.c m32r-dis.c: $(M32R_DEPS)
 	@true
 stamp-m32r: $(CGENFILES) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc
-	$(MAKE) run-cgen arch=m32r prefix=m32r
+	$(MAKE) run-cgen arch=m32r prefix=m32r options=opinst
 
 fr30-opc.h fr30-opc.c fr30-asm.c fr30-dis.c: $(FR30_DEPS)
 	@true
 stamp-fr30: $(CGENFILES) $(CGENDIR)/fr30.cpu $(CGENDIR)/fr30.opc
-	$(MAKE) run-cgen arch=fr30 prefix=fr30
+	$(MAKE) run-cgen arch=fr30 prefix=fr30 options=
 
 # Use a prefix of i960c, so that the existing i960-dis.c can remain for now.
 # When the cgen i960 disassembler support is complete, this `c' can go away.
 i960c-opc.h i960c-opc.c i960c-asm.c i960c-dis.c: $(I960_DEPS)
 	@true
 stamp-i960: $(CGENFILES) $(CGENDIR)/i960.cpu $(CGENDIR)/i960.opc
-	$(MAKE) run-cgen arch=i960 prefix=i960c
+	$(MAKE) run-cgen arch=i960 prefix=i960c options=
 # end-sanitize-cygnus
 
 # start-sanitize-tic80
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index b9a6efa97f1..c841bbdcbf1 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -281,7 +281,7 @@ CGENFILES = $(CGENDIR)/cos.scm $(CGENDIR)/utils.scm \
 	$(CGENDIR)/opcodes.scm $(CGENDIR)/cgen-opc.scm \
 	cgen-opc.in cgen-asm.in cgen-dis.in
 # The CGEN_MAINT conditional is put here so it ends up in Makefile.in
-# properly sanitized.
+# properly sanitised.
 @CGEN_MAINT_TRUE@M32R_DEPS = stamp-m32r
 @CGEN_MAINT_TRUE@FR30_DEPS = stamp-fr30
 @CGEN_MAINT_TRUE@I960_DEPS = stamp-i960
@@ -666,7 +666,7 @@ config.status: $(srcdir)/configure $(srcdir)/../bfd/configure.in
 
 # start-sanitize-cygnus
 run-cgen:
-	$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix)
+	$(SHELL) $(srcdir)/cgen.sh opcodes $(srcdir) $(CGEN) $(CGENDIR) $(CGENFLAGS) $(arch) $(prefix) $(options)
 	touch stamp-${prefix}
 .PHONY: run-cgen
 
@@ -674,19 +674,19 @@ run-cgen:
 m32r-opc.h m32r-opc.c m32r-asm.c m32r-dis.c: $(M32R_DEPS)
 	@true
 stamp-m32r: $(CGENFILES) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc
-	$(MAKE) run-cgen arch=m32r prefix=m32r
+	$(MAKE) run-cgen arch=m32r prefix=m32r options=opinst
 
 fr30-opc.h fr30-opc.c fr30-asm.c fr30-dis.c: $(FR30_DEPS)
 	@true
 stamp-fr30: $(CGENFILES) $(CGENDIR)/fr30.cpu $(CGENDIR)/fr30.opc
-	$(MAKE) run-cgen arch=fr30 prefix=fr30
+	$(MAKE) run-cgen arch=fr30 prefix=fr30 options=
 
 # Use a prefix of i960c, so that the existing i960-dis.c can remain for now.
 # When the cgen i960 disassembler support is complete, this `c' can go away.
 i960c-opc.h i960c-opc.c i960c-asm.c i960c-dis.c: $(I960_DEPS)
 	@true
 stamp-i960: $(CGENFILES) $(CGENDIR)/i960.cpu $(CGENDIR)/i960.opc
-	$(MAKE) run-cgen arch=i960 prefix=i960c
+	$(MAKE) run-cgen arch=i960 prefix=i960c options=
 # end-sanitize-cygnus
 
 # start-sanitize-tic80
-- 
2.30.2